From patchwork Wed May 23 07:01:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: simon X-Patchwork-Id: 10420515 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6878D60327 for ; Wed, 23 May 2018 07:48:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5A6E028845 for ; Wed, 23 May 2018 07:48:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4D9E328860; Wed, 23 May 2018 07:48:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E0F2728845 for ; Wed, 23 May 2018 07:48:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754478AbeEWHsT (ORCPT ); Wed, 23 May 2018 03:48:19 -0400 Received: from mail-pl0-f66.google.com ([209.85.160.66]:43870 "EHLO mail-pl0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932111AbeEWHr6 (ORCPT ); Wed, 23 May 2018 03:47:58 -0400 Received: by mail-pl0-f66.google.com with SMTP id c41-v6so12498153plj.10; Wed, 23 May 2018 00:47:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ZB7zpi2XoJt5fLnNQ3hRpNyoThUsIHwZ8V+LkldTJ10=; b=ZViMbsuqPwC+Wl2A25djczK+zfMpsTy3g+awRm9LC01pu0JjAcw45L3T0Zqm+tloUI xK7CPLCH4T4sdUFjwzxthHHAndiBEyVTsH+GF+CGBtrlpJoHMKcqeuxJJheRG+yd9MFS cAdbGj+yLNNrQGmaTLIqDnWQzwxIiPzHgIWW/2wYRxLeTezi3W1jn38Wg01HqpRGmfSI NkMloBM56lb/1SjplTcsPEFBlyltSiCwohUJRGn4n9xhLLXGxBgKMSIofusw+6CA6x35 pPU91ySg3LOFwtbzAHn1dOG8yLSTrDC6WZrAIKdV09o/tEDCqfKwgRCq7VuM6G2q+h+V VBMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ZB7zpi2XoJt5fLnNQ3hRpNyoThUsIHwZ8V+LkldTJ10=; b=S1XiJU1a/tW4d3lIeaQb5pImYRdeAreBZKTelV7QGjkjDPmn4vf6Inf70ylSfJilK/ jLEJ+csAfFZf/p+msfE4telFSBmBlDF/ANmdC4+ZKwPqVt2A7T2wcNuu8RF1JsY2w4nc r7KeDQ24IrVZW/g0f6cvN1HeWeEIIt+ctLClmISSZ3K7ENhNtWMD1Dk4u61paSWL2Puj qUqYHe4+v2wN/CcO9yFQDo2WZhbQv0k+1nMXFQTdDTMEsvbo/dP+qdmsLIcAxWtBaTrP An4HecmuXH1uo59qr7hKsFXwi3kC57IhpR+KIvb0OqZYFdKL14fE060YjxAxXFEg6mgC 7ruQ== X-Gm-Message-State: ALKqPwfPm3Oxl1CcxWa8amEIG/KIFDMM6HRFLKLFLfi6EsRTBSG5/cQC BdMjbjuyaLhozXJS3msV8Z809g== X-Google-Smtp-Source: AB8JxZrN0/HUb6dMw3ch9ihJSsWz/Iuu8dk1EKC0PXj00VFRzKUhn7dVoVxEy8j19jbvH8DJdR/hOA== X-Received: by 2002:a17:902:10c:: with SMTP id 12-v6mr1877009plb.252.1527061677408; Wed, 23 May 2018 00:47:57 -0700 (PDT) Received: from simonLocalRHEL7.cn.ibm.com ([112.73.0.89]) by smtp.gmail.com with ESMTPSA id a4-v6sm39079171pfj.19.2018.05.23.00.47.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 23 May 2018 00:47:56 -0700 (PDT) From: wei.guo.simon@gmail.com To: linuxppc-dev@lists.ozlabs.org Cc: Paul Mackerras , kvm@vger.kernel.org, kvm-ppc@vger.kernel.org, Simon Guo Subject: [PATCH v4 16/29] KVM: PPC: Book3S PR: add math support for PR KVM HTM Date: Wed, 23 May 2018 15:01:59 +0800 Message-Id: <1527058932-7434-17-git-send-email-wei.guo.simon@gmail.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1527058932-7434-1-git-send-email-wei.guo.simon@gmail.com> References: <1527058932-7434-1-git-send-email-wei.guo.simon@gmail.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Simon Guo The math registers will be saved into vcpu->arch.fp/vr and corresponding vcpu->arch.fp_tm/vr_tm area. We flush or giveup the math regs into vcpu->arch.fp/vr before saving transaction. After transaction is restored, the math regs will be loaded back into regs. If there is a FP/VEC/VSX unavailable exception during transaction active state, the math checkpoint content might be incorrect and we need to do treclaim./load the correct checkpoint val/trechkpt. sequence to retry the transaction. That will make our solution complicated. To solve this issue, we always make the hardware guest MSR math bits (shadow_msr) consistent with the MSR val which guest sees (kvmppc_get_msr()) when guest msr is with tm enabled. Then all FP/VEC/VSX unavailable exception can be delivered to guest and guest handles the exception by itself. Signed-off-by: Simon Guo --- arch/powerpc/kvm/book3s_pr.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c index 226bae7..4b81b3c 100644 --- a/arch/powerpc/kvm/book3s_pr.c +++ b/arch/powerpc/kvm/book3s_pr.c @@ -308,6 +308,28 @@ static inline void kvmppc_restore_tm_sprs(struct kvm_vcpu *vcpu) tm_disable(); } +/* loadup math bits which is enabled at kvmppc_get_msr() but not enabled at + * hardware. + */ +static void kvmppc_handle_lost_math_exts(struct kvm_vcpu *vcpu) +{ + ulong exit_nr; + ulong ext_diff = (kvmppc_get_msr(vcpu) & ~vcpu->arch.guest_owned_ext) & + (MSR_FP | MSR_VEC | MSR_VSX); + + if (!ext_diff) + return; + + if (ext_diff == MSR_FP) + exit_nr = BOOK3S_INTERRUPT_FP_UNAVAIL; + else if (ext_diff == MSR_VEC) + exit_nr = BOOK3S_INTERRUPT_ALTIVEC; + else + exit_nr = BOOK3S_INTERRUPT_VSX; + + kvmppc_handle_ext(vcpu, exit_nr, ext_diff); +} + void kvmppc_save_tm_pr(struct kvm_vcpu *vcpu) { if (!(MSR_TM_ACTIVE(kvmppc_get_msr(vcpu)))) { @@ -315,6 +337,8 @@ void kvmppc_save_tm_pr(struct kvm_vcpu *vcpu) return; } + kvmppc_giveup_ext(vcpu, MSR_VSX); + preempt_disable(); _kvmppc_save_tm_pr(vcpu, mfmsr()); preempt_enable(); @@ -324,12 +348,18 @@ void kvmppc_restore_tm_pr(struct kvm_vcpu *vcpu) { if (!MSR_TM_ACTIVE(kvmppc_get_msr(vcpu))) { kvmppc_restore_tm_sprs(vcpu); + if (kvmppc_get_msr(vcpu) & MSR_TM) + kvmppc_handle_lost_math_exts(vcpu); return; } preempt_disable(); _kvmppc_restore_tm_pr(vcpu, kvmppc_get_msr(vcpu)); preempt_enable(); + + if (kvmppc_get_msr(vcpu) & MSR_TM) + kvmppc_handle_lost_math_exts(vcpu); + } #endif @@ -468,6 +498,11 @@ static void kvmppc_set_msr_pr(struct kvm_vcpu *vcpu, u64 msr) /* Preload FPU if it's enabled */ if (kvmppc_get_msr(vcpu) & MSR_FP) kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP); + +#ifdef CONFIG_PPC_TRANSACTIONAL_MEM + if (kvmppc_get_msr(vcpu) & MSR_TM) + kvmppc_handle_lost_math_exts(vcpu); +#endif } void kvmppc_set_pvr_pr(struct kvm_vcpu *vcpu, u32 pvr)