From patchwork Fri Sep 28 09:45:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Mackerras X-Patchwork-Id: 10619265 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4C17E180E for ; Fri, 28 Sep 2018 09:46:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3E0A32AB2B for ; Fri, 28 Sep 2018 09:46:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 325942AB6C; Fri, 28 Sep 2018 09:46:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8A7D42AB78 for ; Fri, 28 Sep 2018 09:46:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729382AbeI1QJ2 (ORCPT ); Fri, 28 Sep 2018 12:09:28 -0400 Received: from ozlabs.org ([203.11.71.1]:53797 "EHLO ozlabs.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729361AbeI1QJ2 (ORCPT ); Fri, 28 Sep 2018 12:09:28 -0400 Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPSA id 42M6JQ1kblz9t18; Fri, 28 Sep 2018 19:46:30 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=ozlabs.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1538127990; bh=RZo5Hm07SLDWlDnjMCIecouxIU4ji/j2r4o3an1UiZw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KfQESjeUocaeRb2EKBAGeTL3uQcG/tVUFWb0ga30dV58cUU7i5F0xUhdhM0ivLSFt BPnwSe1ozx0y8VoiEY//3hmBLCAPh1K4+gfMMT3b328K3XjZEXzERsOEUtFQUe6wHG +g2y4UsqT3dLS7kQvp/kFw7Scm4/l86t3xacTUNrQ9h0dWSyxfEvYE9H4VjUodTud4 0vecO//px2YnEaKR9J4Cp7T2gpEoeueXdc6+p4P77T8fjxuwMa9KAPIJ9ap/49vS6M t2mtbeZUzCa/BAKh085vq21nliS4DaZzgdwylqZfyjozGxkBnOF1l7bB4R2VC5sMaE zmxCWFeLrjvfA== From: Paul Mackerras To: kvm@vger.kernel.org, kvm-ppc@vger.kernel.org Cc: linuxppc-dev@ozlabs.org, David Gibson Subject: [PATCH v2 22/33] KVM: PPC: Book3S HV: Framework to handle HV Emulation Assist Interrupt Date: Fri, 28 Sep 2018 19:45:52 +1000 Message-Id: <1538127963-15645-23-git-send-email-paulus@ozlabs.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538127963-15645-1-git-send-email-paulus@ozlabs.org> References: <1538127963-15645-1-git-send-email-paulus@ozlabs.org> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Suraj Jitindar Singh A HEAI (hypervisor emulation assistance interrupt) occurs when a hypervisor resource or instruction is used in a privileged but non-hypervisor state and the LPCR_EVIRT bit is set in LPCR. When this occurs bit 45 is set in HSRR1. Detect the occurrence of this, and if userspace has enabled the nested virtualization capability on the VM, then call the code to handle it accordingly. With LPCR[EVIRT] set, we also get HEAI (without bit 45 set) for mfspr or mtspr to unimplemented SPR numbers. For these accesses, we emulate the EVIRT=0 behaviour, which is to make the access a no-op for privileged software unless it is accessing SPR 0, 4, 5 or 6. Problem-state accesses and accesses to SPR 0, 4, 5 or 6 generate an illegal-instruction type program interrupt. Reviewed-by: David Gibson Signed-off-by: Suraj Jitindar Singh Signed-off-by: Paul Mackerras --- arch/powerpc/include/asm/kvm_book3s.h | 2 + arch/powerpc/kvm/book3s_hv.c | 87 ++++++++++++++++++++++------------- arch/powerpc/kvm/book3s_hv_nested.c | 55 ++++++++++++++++++++++ 3 files changed, 112 insertions(+), 32 deletions(-) diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h index 2dd996c..80b43ac 100644 --- a/arch/powerpc/include/asm/kvm_book3s.h +++ b/arch/powerpc/include/asm/kvm_book3s.h @@ -287,6 +287,8 @@ void kvmhv_save_hv_regs(struct kvm_vcpu *vcpu, struct hv_guest_state *hr); void kvmhv_restore_hv_return_state(struct kvm_vcpu *vcpu, struct hv_guest_state *hr); long int kvmhv_nested_page_fault(struct kvm_vcpu *vcpu); +int kvmhv_emulate_priv(struct kvm_run *run, struct kvm_vcpu *vcpu, + unsigned int instr); void kvmppc_giveup_fac(struct kvm_vcpu *vcpu, ulong fac); diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c index 84d08d5..b705668 100644 --- a/arch/powerpc/kvm/book3s_hv.c +++ b/arch/powerpc/kvm/book3s_hv.c @@ -1027,30 +1027,6 @@ static int kvmppc_hcall_impl_hv(unsigned long cmd) return kvmppc_hcall_impl_hv_realmode(cmd); } -static int kvmppc_emulate_debug_inst(struct kvm_run *run, - struct kvm_vcpu *vcpu) -{ - u32 last_inst; - - if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst) != - EMULATE_DONE) { - /* - * Fetch failed, so return to guest and - * try executing it again. - */ - return RESUME_GUEST; - } - - if (last_inst == KVMPPC_INST_SW_BREAKPOINT) { - run->exit_reason = KVM_EXIT_DEBUG; - run->debug.arch.address = kvmppc_get_pc(vcpu); - return RESUME_HOST; - } else { - kvmppc_core_queue_program(vcpu, SRR1_PROGILL); - return RESUME_GUEST; - } -} - static void do_nothing(void *x) { } @@ -1144,6 +1120,23 @@ static int kvmppc_emulate_doorbell_instr(struct kvm_vcpu *vcpu) return RESUME_GUEST; } +static int kvmhv_emulate_unknown_spr(struct kvm_vcpu *vcpu, u32 instr) +{ + u32 spr = get_sprn(instr); + + /* + * In privileged state, access to unimplemented SPRs is a no-op + * except for SPR 0, 4, 5 and 6. All other accesses get turned + * into illegal-instruction program interrupts. + */ + if ((vcpu->arch.shregs.msr & MSR_PR) || + spr == 0 || (4 <= spr && spr <= 6)) + return EMULATE_FAIL; + + kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4); + return RESUME_GUEST; +} + static int kvmppc_handle_exit_hv(struct kvm_run *run, struct kvm_vcpu *vcpu, struct task_struct *tsk) { @@ -1260,19 +1253,49 @@ static int kvmppc_handle_exit_hv(struct kvm_run *run, struct kvm_vcpu *vcpu, * to the guest. If guest debug is enabled, we need to check * whether the instruction is a software breakpoint instruction. * Accordingly return to Guest or Host. + * With LPCR[EVIRT] set, we also get these for accesses to + * unknown SPRs and for guests executing hypervisor privileged + * instructions. */ case BOOK3S_INTERRUPT_H_EMUL_ASSIST: - if (vcpu->arch.emul_inst != KVM_INST_FETCH_FAILED) - vcpu->arch.last_inst = kvmppc_need_byteswap(vcpu) ? - swab32(vcpu->arch.emul_inst) : - vcpu->arch.emul_inst; - if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) { - r = kvmppc_emulate_debug_inst(run, vcpu); + { + u32 instr = vcpu->arch.emul_inst; + unsigned long srr1_bit = SRR1_PROGILL; + + vcpu->arch.last_inst = kvmppc_need_byteswap(vcpu) ? + swab32(instr) : instr; + + r = EMULATE_FAIL; + if (vcpu->arch.shregs.msr & SRR1_PROGPRIV) { + /* + * Tried to execute hypervisor privileged instruction + * or mtspr/mfspr on a hypervisor privileged SPR while + * MSR(HV | PR) == 0b00 -> Privileged but !HV state + */ + srr1_bit = SRR1_PROGPRIV; + if (vcpu->kvm->arch.nested_enable) + r = kvmhv_emulate_priv(run, vcpu, instr); } else { - kvmppc_core_queue_program(vcpu, SRR1_PROGILL); + /* Illegal instruction or unknown SPR access */ + if (instr == KVMPPC_INST_SW_BREAKPOINT && + (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)) { + run->exit_reason = KVM_EXIT_DEBUG; + run->debug.arch.address = kvmppc_get_pc(vcpu); + r = RESUME_HOST; + break; + } + if ((instr & 0xfc0006fe) == PPC_INST_MFSPR) + /* mfspr or mtspr to unknown SPR, may be noop */ + r = kvmhv_emulate_unknown_spr(vcpu, instr); + } + if (r == EMULATE_FAIL) { + pr_debug("KVM: Couldn't emulate instruction 0x%.8x\n", + instr); + kvmppc_core_queue_program(vcpu, srr1_bit); r = RESUME_GUEST; } break; + } /* * This occurs if the guest (kernel or userspace), does something that * is prohibited by HFSCR. @@ -4612,7 +4635,7 @@ static int kvmppc_core_init_vm_hv(struct kvm *kvm) */ if (cpu_has_feature(CPU_FTR_ARCH_300)) { lpcr &= ~LPCR_VPM0; - lpcr |= LPCR_HVICE | LPCR_HEIC; + lpcr |= LPCR_HVICE | LPCR_HEIC | LPCR_EVIRT; /* * If xive is enabled, we route 0x500 interrupts directly diff --git a/arch/powerpc/kvm/book3s_hv_nested.c b/arch/powerpc/kvm/book3s_hv_nested.c index 0173f86..b004639 100644 --- a/arch/powerpc/kvm/book3s_hv_nested.c +++ b/arch/powerpc/kvm/book3s_hv_nested.c @@ -15,6 +15,7 @@ #include #include #include +#include static struct patb_entry *pseries_partition_tb; @@ -511,3 +512,57 @@ long kvmhv_nested_page_fault(struct kvm_vcpu *vcpu) { return RESUME_HOST; } + +static int kvmhv_emulate_priv_mtspr(struct kvm_run *run, struct kvm_vcpu *vcpu, + unsigned int instr) +{ + return EMULATE_FAIL; +} + +static int kvmhv_emulate_priv_mfspr(struct kvm_run *run, struct kvm_vcpu *vcpu, + unsigned int instr) +{ + return EMULATE_FAIL; +} + +static int kvmhv_emulate_priv_op_31(struct kvm_run *run, struct kvm_vcpu *vcpu, + unsigned int instr) +{ + return EMULATE_FAIL; +} + +static int kvmhv_emulate_priv_op(struct kvm_run *run, struct kvm_vcpu *vcpu, + unsigned int instr) +{ + return EMULATE_FAIL; +} + +int kvmhv_emulate_priv(struct kvm_run *run, struct kvm_vcpu *vcpu, + unsigned int instr) +{ + int rc = EMULATE_FAIL; + + switch (get_op(instr)) { + case 31: + switch (get_xop(instr)) { + case OP_31_XOP_MTSPR: + rc = kvmhv_emulate_priv_mtspr(run, vcpu, instr); + break; + case OP_31_XOP_MFSPR: + rc = kvmhv_emulate_priv_mfspr(run, vcpu, instr); + break; + default: + rc = kvmhv_emulate_priv_op_31(run, vcpu, instr); + break; + } + + if (rc == EMULATE_DONE) + kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4); + break; + default: + rc = kvmhv_emulate_priv_op(run, vcpu, instr); + break; + } + + return rc; +}