diff mbox series

[v2,1/5] KVM: X86: Dynamic allocate core residency msr state

Message ID 1560238451-19495-2-git-send-email-wanpengli@tencent.com (mailing list archive)
State New, archived
Headers show
Series KVM: X86: Add virtual C-states residency msrs support | expand

Commit Message

Wanpeng Li June 11, 2019, 7:34 a.m. UTC 
From: Wanpeng Li <wanpengli@tencent.com>

Dynamic allocate core residency msr state. MSR_CORE_C1_RES is unreadable 
except for ATOM platform, so it is ignore here.

Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim Krčmář <rkrcmar@redhat.com>
Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
---
 arch/x86/include/asm/kvm_host.h | 11 +++++++++++
 arch/x86/kvm/vmx/vmx.c          |  5 +++++
 2 files changed, 16 insertions(+)

Comments

Sean Christopherson June 12, 2019, 4:01 p.m. UTC | #1 
On Tue, Jun 11, 2019 at 03:34:07PM +0800, Wanpeng Li wrote:
> From: Wanpeng Li <wanpengli@tencent.com>
> 
> Dynamic allocate core residency msr state. MSR_CORE_C1_RES is unreadable 
> except for ATOM platform, so it is ignore here.
> 
> Cc: Paolo Bonzini <pbonzini@redhat.com>
> Cc: Radim Krčmář <rkrcmar@redhat.com>
> Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
> ---
>  arch/x86/include/asm/kvm_host.h | 11 +++++++++++
>  arch/x86/kvm/vmx/vmx.c          |  5 +++++
>  2 files changed, 16 insertions(+)
> 
> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> index 15e973d..bd615ee 100644
> --- a/arch/x86/include/asm/kvm_host.h
> +++ b/arch/x86/include/asm/kvm_host.h
> @@ -538,6 +538,15 @@ struct kvm_vcpu_hv {
>  	cpumask_t tlb_flush;
>  };
>  
> +#define NR_CORE_RESIDENCY_MSRS 3
> +
> +struct kvm_residency_msr {
> +	s64 value;
> +	u32 index;
> +	bool delta_from_host;
> +	bool count_with_host;
> +};
> +
>  struct kvm_vcpu_arch {
>  	/*
>  	 * rip and regs accesses must go through
> @@ -785,6 +794,8 @@ struct kvm_vcpu_arch {
>  
>  	/* AMD MSRC001_0015 Hardware Configuration */
>  	u64 msr_hwcr;
> +
> +	struct kvm_residency_msr *core_cstate_msrs;

Why are these in kvm_vcpu_arch?  AFAICT they're only wired up for VMX.

>  };
>  
>  struct kvm_lpage_info {
> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index 0b241f4..4dc2459 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -6658,6 +6658,11 @@ static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, unsigned int id)
>  			goto free_vmcs;
>  	}
>  
> +	vmx->vcpu.arch.core_cstate_msrs = kzalloc(sizeof(struct kvm_residency_msr) *
> +		NR_CORE_RESIDENCY_MSRS, GFP_KERNEL_ACCOUNT);
> +	if (!vmx->vcpu.arch.core_cstate_msrs)
> +		goto free_vmcs;
> +
>  	if (nested)
>  		nested_vmx_setup_ctls_msrs(&vmx->nested.msrs,
>  					   vmx_capability.ept,
> -- 
> 2.7.4
>
Wanpeng Li June 13, 2019, 12:43 a.m. UTC | #2 
On Thu, 13 Jun 2019 at 00:01, Sean Christopherson
<sean.j.christopherson@intel.com> wrote:
>
> On Tue, Jun 11, 2019 at 03:34:07PM +0800, Wanpeng Li wrote:
> > From: Wanpeng Li <wanpengli@tencent.com>
> >
> > Dynamic allocate core residency msr state. MSR_CORE_C1_RES is unreadable
> > except for ATOM platform, so it is ignore here.
> >
> > Cc: Paolo Bonzini <pbonzini@redhat.com>
> > Cc: Radim Krčmář <rkrcmar@redhat.com>
> > Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
> > ---
> >  arch/x86/include/asm/kvm_host.h | 11 +++++++++++
> >  arch/x86/kvm/vmx/vmx.c          |  5 +++++
> >  2 files changed, 16 insertions(+)
> >
> > diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> > index 15e973d..bd615ee 100644
> > --- a/arch/x86/include/asm/kvm_host.h
> > +++ b/arch/x86/include/asm/kvm_host.h
> > @@ -538,6 +538,15 @@ struct kvm_vcpu_hv {
> >       cpumask_t tlb_flush;
> >  };
> >
> > +#define NR_CORE_RESIDENCY_MSRS 3
> > +
> > +struct kvm_residency_msr {
> > +     s64 value;
> > +     u32 index;
> > +     bool delta_from_host;
> > +     bool count_with_host;
> > +};
> > +
> >  struct kvm_vcpu_arch {
> >       /*
> >        * rip and regs accesses must go through
> > @@ -785,6 +794,8 @@ struct kvm_vcpu_arch {
> >
> >       /* AMD MSRC001_0015 Hardware Configuration */
> >       u64 msr_hwcr;
> > +
> > +     struct kvm_residency_msr *core_cstate_msrs;
>
> Why are these in kvm_vcpu_arch?  AFAICT they're only wired up for VMX.

They can be used by SVM later though I'm too busy to do that.

Regards,
Wanpeng Li
diff mbox series

Patch

diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 15e973d..bd615ee 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -538,6 +538,15 @@  struct kvm_vcpu_hv {
 	cpumask_t tlb_flush;
 };
 
+#define NR_CORE_RESIDENCY_MSRS 3
+
+struct kvm_residency_msr {
+	s64 value;
+	u32 index;
+	bool delta_from_host;
+	bool count_with_host;
+};
+
 struct kvm_vcpu_arch {
 	/*
 	 * rip and regs accesses must go through
@@ -785,6 +794,8 @@  struct kvm_vcpu_arch {
 
 	/* AMD MSRC001_0015 Hardware Configuration */
 	u64 msr_hwcr;
+
+	struct kvm_residency_msr *core_cstate_msrs;
 };
 
 struct kvm_lpage_info {
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 0b241f4..4dc2459 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -6658,6 +6658,11 @@  static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, unsigned int id)
 			goto free_vmcs;
 	}
 
+	vmx->vcpu.arch.core_cstate_msrs = kzalloc(sizeof(struct kvm_residency_msr) *
+		NR_CORE_RESIDENCY_MSRS, GFP_KERNEL_ACCOUNT);
+	if (!vmx->vcpu.arch.core_cstate_msrs)
+		goto free_vmcs;
+
 	if (nested)
 		nested_vmx_setup_ctls_msrs(&vmx->nested.msrs,
 					   vmx_capability.ept,