diff mbox series

[3/4] kvm: svm: Emulate UMIP instructions on non SEV guest

Message ID 157262963095.2838.4880629527800792709.stgit@naples-babu.amd.com (mailing list archive)
State New, archived
Headers show
Series Emulate and enable UMIP feature on AMD | expand

Commit Message

Moger, Babu Nov. 1, 2019, 5:33 p.m. UTC 
Emulation of UMIP instructions (sgdt, sidt, sldt, smsw and str) requires
the hypervisor to read and write the guest memory. Guest memory is
encrypted on SEV guest. Hypervisor cannot successfully read or write the
guest memory. So disable emulation on SEV guest. Enable the emulation only
on non SEV guest.

Signed-off-by: Babu Moger <babu.moger@amd.com>
---
 arch/x86/kvm/svm.c |    9 +++++++++
 1 file changed, 9 insertions(+)
diff mbox series

Patch

diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 79abbdeca148..267dae94e5ca 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -1535,6 +1535,15 @@  static void init_vmcb(struct vcpu_svm *svm)
 	set_intercept(svm, INTERCEPT_NMI);
 	set_intercept(svm, INTERCEPT_SMI);
 	set_intercept(svm, INTERCEPT_SELECTIVE_CR0);
+
+	/* Enable interception only on non-sev guest */
+	if (!sev_guest(svm->vcpu.kvm)) {
+		set_intercept(svm, INTERCEPT_STORE_IDTR);
+		set_intercept(svm, INTERCEPT_STORE_GDTR);
+		set_intercept(svm, INTERCEPT_STORE_LDTR);
+		set_intercept(svm, INTERCEPT_STORE_TR);
+	}
+
 	set_intercept(svm, INTERCEPT_RDPMC);
 	set_intercept(svm, INTERCEPT_CPUID);
 	set_intercept(svm, INTERCEPT_INVD);