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Tue, 28 Jul 2020 23:38:28 +0000 Subject: [PATCH v3 06/11] KVM: SVM: Add new intercept vector in vmcb_control_area From: Babu Moger To: pbonzini@redhat.com, vkuznets@redhat.com, wanpengli@tencent.com, sean.j.christopherson@intel.com, jmattson@google.com Cc: kvm@vger.kernel.org, joro@8bytes.org, x86@kernel.org, linux-kernel@vger.kernel.org, mingo@redhat.com, bp@alien8.de, hpa@zytor.com, tglx@linutronix.de Date: Tue, 28 Jul 2020 18:38:26 -0500 Message-ID: <159597950612.12744.7213388116029286561.stgit@bmoger-ubuntu> In-Reply-To: <159597929496.12744.14654593948763926416.stgit@bmoger-ubuntu> References: <159597929496.12744.14654593948763926416.stgit@bmoger-ubuntu> User-Agent: StGit/0.17.1-dirty X-ClientProxiedBy: SN4PR0201CA0039.namprd02.prod.outlook.com (2603:10b6:803:2e::25) To SN1PR12MB2560.namprd12.prod.outlook.com (2603:10b6:802:26::19) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from [127.0.1.1] (165.204.77.1) by SN4PR0201CA0039.namprd02.prod.outlook.com (2603:10b6:803:2e::25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3216.23 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: FnO3ooG868cPb2NvMjZ7WU0xEbj32sgAOfXaDuviv4bduMT6IcP1UiiAImKQ6ScSfZGTgCiu7vkMzdAv4ckTd2qN9MtHW9rLDBrUvm24BICRo1dcwlHEveeSJrclR9FvOHv6fK7BjNH4MNhiGGQCbQr9b0SWAhcKSVO5Acilxw+xMBV3LUc0qNELB05rq7k6caDBfg4biDUgPKN3iHKcD5NKvBZN7E/wxYbjCnGIshx6h55p3DgcfJ6KwXjOpIPAGhwvZwCURmVs3GuutJvsVxntY4UsfXZSDAEdLHr0Wb/ymgiFckEnimVa8Lg3LpaIoYMccoTQoO4qfE2wrIf85GeuWwIJWxJP0Tdt/e0qEB1MYdd/ltQcdoBdvijXc3uf/IIDGzCtBuYacr1QXppBRJoMHriiqJjKUktfjSptxU90HUqqUKJqvGuq4JzzCjxSvuAQ8bs2kTySr8GsRigO3B3eflf1bYVB/5TJ7y1Mbb7EStqCrAkGrAo5YjCVoUp1OT7wiedpRpk7KVLOflzN0N0O2tp0Jp2YMjOf//0SICBPP6h0D3ax4NMwnO3MKL0jtVWXyeq3wUh+Z4HOMPHzNPcl3VVFl1w8jSNbW8y14g+SeuDKtbiE/UTFbKOGIPtKQQliDoQ0FpUXfoemIWJ48w== X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: e0ef879e-9e05-4c8b-b1fe-08d8334f5442 X-MS-Exchange-CrossTenant-AuthSource: SN1PR12MB2560.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Jul 2020 23:38:28.4743 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: rnd3ld+D1M9l+jzYs2Ny7GDLaCXqXtCVv2Lmvgwp/1gvyVFQjxdLj0hyzcimprPq X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1PR12MB2559 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The new intercept bits have been added in vmcb control area to support few more interceptions. Here are the some of them. - INTERCEPT_INVLPGB, - INTERCEPT_INVLPGB_ILLEGAL, - INTERCEPT_INVPCID, - INTERCEPT_MCOMMIT, - INTERCEPT_TLBSYNC, Add new intercept vector in vmcb_control_area to support these instructions. Also update kvm_nested_vmrun trace function to support the new addition. AMD documentation for these instructions is available at "AMD64 Architecture Programmer’s Manual Volume 2: System Programming, Pub. 24593 Rev. 3.34(or later)" The documentation can be obtained at the links below: Link: https://www.amd.com/system/files/TechDocs/24593.pdf Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 Signed-off-by: Babu Moger Reviewed-by: Jim Mattson --- arch/x86/include/asm/svm.h | 7 +++++++ arch/x86/kvm/svm/nested.c | 3 ++- arch/x86/kvm/trace.h | 13 ++++++++----- 3 files changed, 17 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h index aa9f1d62db29..75cbcfb81332 100644 --- a/arch/x86/include/asm/svm.h +++ b/arch/x86/include/asm/svm.h @@ -16,6 +16,7 @@ enum vector_offset { EXCEPTION_VECTOR, INTERCEPT_VECTOR_3, INTERCEPT_VECTOR_4, + INTERCEPT_VECTOR_5, MAX_VECTORS, }; @@ -124,6 +125,12 @@ enum { INTERCEPT_MWAIT_COND, INTERCEPT_XSETBV, INTERCEPT_RDPRU, + /* Byte offset 014h (Vector 5) */ + INTERCEPT_INVLPGB = 160, + INTERCEPT_INVLPGB_ILLEGAL, + INTERCEPT_INVPCID, + INTERCEPT_MCOMMIT, + INTERCEPT_TLBSYNC, }; diff --git a/arch/x86/kvm/svm/nested.c b/arch/x86/kvm/svm/nested.c index d2552de42fb1..b0e47f474bb6 100644 --- a/arch/x86/kvm/svm/nested.c +++ b/arch/x86/kvm/svm/nested.c @@ -432,7 +432,8 @@ int nested_svm_vmrun(struct vcpu_svm *svm) nested_vmcb->control.intercepts[CR_VECTOR] >> 16, nested_vmcb->control.intercepts[EXCEPTION_VECTOR], nested_vmcb->control.intercepts[INTERCEPT_VECTOR_3], - nested_vmcb->control.intercepts[INTERCEPT_VECTOR_4]); + nested_vmcb->control.intercepts[INTERCEPT_VECTOR_4], + nested_vmcb->control.intercepts[INTERCEPT_VECTOR_5]); /* Clear internal status */ kvm_clear_exception_queue(&svm->vcpu); diff --git a/arch/x86/kvm/trace.h b/arch/x86/kvm/trace.h index 6e7262229e6a..11046171b5d9 100644 --- a/arch/x86/kvm/trace.h +++ b/arch/x86/kvm/trace.h @@ -544,9 +544,10 @@ TRACE_EVENT(kvm_nested_vmrun, ); TRACE_EVENT(kvm_nested_intercepts, - TP_PROTO(__u16 cr_read, __u16 cr_write, __u32 exceptions, __u32 intercept1, - __u32 intercept2), - TP_ARGS(cr_read, cr_write, exceptions, intercept1, intercept2), + TP_PROTO(__u16 cr_read, __u16 cr_write, __u32 exceptions, + __u32 intercept1, __u32 intercept2, __u32 intercept3), + TP_ARGS(cr_read, cr_write, exceptions, intercept1, + intercept2, intercept3), TP_STRUCT__entry( __field( __u16, cr_read ) @@ -554,6 +555,7 @@ TRACE_EVENT(kvm_nested_intercepts, __field( __u32, exceptions ) __field( __u32, intercept1 ) __field( __u32, intercept2 ) + __field( __u32, intercept3 ) ), TP_fast_assign( @@ -562,12 +564,13 @@ TRACE_EVENT(kvm_nested_intercepts, __entry->exceptions = exceptions; __entry->intercept1 = intercept1; __entry->intercept2 = intercept2; + __entry->intercept3 = intercept3; ), TP_printk("cr_read: %04x cr_write: %04x excp: %08x " - "intercept1: %08x intercept2: %08x", + "intercept1: %08x intercept2: %08x intercept3: %08x", __entry->cr_read, __entry->cr_write, __entry->exceptions, - __entry->intercept1, __entry->intercept2) + __entry->intercept1, __entry->intercept2, __entry->intercept3) ); /* * Tracepoint for #VMEXIT while nested