@@ -158,7 +158,10 @@ static inline u8 cpuid_maxphyaddr(void)
#define X86_FEATURE_LA57 (CPUID(0x7, 0, ECX, 16))
#define X86_FEATURE_RDPID (CPUID(0x7, 0, ECX, 22))
#define X86_FEATURE_SPEC_CTRL (CPUID(0x7, 0, EDX, 26))
+#define X86_FEATURE_STIBP (CPUID(0x7, 0, EDX, 27))
#define X86_FEATURE_ARCH_CAPABILITIES (CPUID(0x7, 0, EDX, 29))
+#define X86_FEATURE_SSBD (CPUID(0x7, 0, EDX, 31))
+
#define X86_FEATURE_NX (CPUID(0x80000001, 0, EDX, 20))
#define X86_FEATURE_RDPRU (CPUID(0x80000008, 0, EBX, 4))
@@ -168,6 +171,9 @@ static inline u8 cpuid_maxphyaddr(void)
#define X86_FEATURE_SVM (CPUID(0x80000001, 0, ECX, 2))
#define X86_FEATURE_RDTSCP (CPUID(0x80000001, 0, EDX, 27))
#define X86_FEATURE_AMD_IBPB (CPUID(0x80000008, 0, EBX, 12))
+#define X86_FEATURE_AMD_IBRS (CPUID(0x80000008, 0, EBX, 14))
+#define X86_FEATURE_AMD_STIBP (CPUID(0x80000008, 0, EBX, 15))
+#define X86_FEATURE_AMD_SSBD (CPUID(0x80000008, 0, EBX, 24))
#define X86_FEATURE_NPT (CPUID(0x8000000A, 0, EDX, 0))
#define X86_FEATURE_NRIPS (CPUID(0x8000000A, 0, EDX, 3))
@@ -20,6 +20,7 @@ tests += $(TEST_DIR)/tscdeadline_latency.flat
tests += $(TEST_DIR)/intel-iommu.flat
tests += $(TEST_DIR)/vmware_backdoors.flat
tests += $(TEST_DIR)/rdpru.flat
+tests += $(TEST_DIR)/spec_ctrl.flat
include $(SRCDIR)/$(TEST_DIR)/Makefile.common
new file mode 100644
@@ -0,0 +1,32 @@
+/* SPEC CTRL Tests */
+
+#include "libcflat.h"
+#include "processor.h"
+
+int main(int ac, char **av)
+{
+ if (this_cpu_has(X86_FEATURE_AMD_IBPB) ||
+ this_cpu_has(X86_FEATURE_AMD_IBRS) ||
+ this_cpu_has(X86_FEATURE_AMD_STIBP) ||
+ this_cpu_has(X86_FEATURE_AMD_SSBD)) {
+ if (this_cpu_has(X86_FEATURE_AMD_IBPB))
+ report(true, "X86_FEATURE_AMD_IBPB detected");
+ if (this_cpu_has(X86_FEATURE_AMD_IBRS))
+ report(true, "X86_FEATURE_AMD_IBRS detected");
+ if (this_cpu_has(X86_FEATURE_AMD_STIBP))
+ report(true, "X86_FEATURE_AMD_STIBP detected");
+ if (this_cpu_has(X86_FEATURE_AMD_SSBD))
+ report(true, "X86_FEATURE_AMD_SSBD detected");
+ } else if (this_cpu_has(X86_FEATURE_SPEC_CTRL) ||
+ this_cpu_has(X86_FEATURE_STIBP) ||
+ this_cpu_has(X86_FEATURE_SSBD)) {
+ if (this_cpu_has(X86_FEATURE_SPEC_CTRL))
+ report(true, "X86_FEATURE_SPEC_CTRL(IBRS and IBPB) detected");
+ if (this_cpu_has(X86_FEATURE_STIBP))
+ report(true, "X86_FEATURE_STIBP detected");
+ if (this_cpu_has(X86_FEATURE_SSBD))
+ report(true, "X86_FEATURE_SSBD detected");
+ }
+
+ return report_summary();
+}
@@ -246,6 +246,11 @@ file = rdpru.flat
extra_params = -cpu host
arch = x86_64
+[spec_ctrl]
+file = spec_ctrl.flat
+extra_params = -cpu host
+arch = x86_64
+
[umip]
file = umip.flat
extra_params = -cpu qemu64,+umip
Displays available SPEC CTRL settings on the host. Signed-off-by: Babu Moger <babu.moger@amd.com> --- lib/x86/processor.h | 6 ++++++ x86/Makefile.x86_64 | 1 + x86/spec_ctrl.c | 32 ++++++++++++++++++++++++++++++++ x86/unittests.cfg | 5 +++++ 4 files changed, 44 insertions(+) create mode 100644 x86/spec_ctrl.c