@@ -294,6 +294,11 @@
#define X86_FEATURE_PER_THREAD_MBA (11*32+ 7) /* "" Per-thread Memory Bandwidth Allocation */
#define X86_FEATURE_SGX1 (11*32+ 8) /* "" Basic SGX */
#define X86_FEATURE_SGX2 (11*32+ 9) /* "" SGX Enclave Dynamic Memory Management (EDMM) */
+#define X86_FEATURE_KL_INS_ENABLED (11*32 + 10) /* "" Key Locker instructions */
+#define X86_FEATURE_KL_WIDE (11*32 + 11) /* "" Wide Key Locker instructions */
+#define X86_FEATURE_IWKEY_BACKUP (11*32 + 12) /* "" IWKey backup */
+#define X86_FEATURE_IWKEY_NOBACKUP (11*32 + 13) /* "" NoBackup parameter to LOADIWKEY */
+#define X86_FEATURE_IWKEY_RAND (11*32 + 14) /* IWKey Randomization */
/* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
#define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */
@@ -38,6 +38,11 @@ struct cpuid_bit {
{ X86_FEATURE_PER_THREAD_MBA, CPUID_ECX, 0, 0x00000010, 3 },
{ X86_FEATURE_SGX1, CPUID_EAX, 0, 0x00000012, 0 },
{ X86_FEATURE_SGX2, CPUID_EAX, 1, 0x00000012, 0 },
+ { X86_FEATURE_KL_INS_ENABLED, CPUID_EBX, 0, 0x00000019, 0 },
+ { X86_FEATURE_KL_WIDE, CPUID_EBX, 2, 0x00000019, 0 },
+ { X86_FEATURE_IWKEY_BACKUP, CPUID_EBX, 4, 0x00000019, 0 },
+ { X86_FEATURE_IWKEY_NOBACKUP, CPUID_ECX, 0, 0x00000019, 0 },
+ { X86_FEATURE_IWKEY_RAND, CPUID_ECX, 1, 0x00000019, 0 },
{ X86_FEATURE_HW_PSTATE, CPUID_EDX, 7, 0x80000007, 0 },
{ X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 },
{ X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 },