From patchwork Mon Feb 26 08:26:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 13571541 Received: from mgamail.intel.com (unknown [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8BBAF12881C; Mon, 26 Feb 2024 08:29:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708936147; cv=none; b=YVq+1NArk+W2NPXvUXRrZUZqJnJQiX0Ye4JH+jGIUELXTAFEIrTR12B4DuYlsNohJF4gKIwguTSK5txOYoN/KpyzzEBTjo1khYgb3pX3leD4dRsLN/szPz1x+uRzlFRY/Oa4PCZnpAk8pHjklSombgelG1p8Ms+TpufSdE3vilk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708936147; c=relaxed/simple; bh=nUfUpWtI/c8UEGyRqPpk6qguNHB+5fFp6Y3yMKH1okk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=F6EoAFXmH5fy4jbTagrc0bxzFzDAcQqwaQA7QOeg9RNl3q2iPYmvD1sBEurXzxRkwKfSUNQDo0JYtGhl4zC48J/531e9taQn6XewDH2YvO5QrjEiEbJBC7iACsAVxSw7310Lz2Evd/0ES6C3nIj02i3RxcqCaH8Xbuc+iwwtYNQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=AI8GxbSH; arc=none smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="AI8GxbSH" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1708936145; x=1740472145; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nUfUpWtI/c8UEGyRqPpk6qguNHB+5fFp6Y3yMKH1okk=; b=AI8GxbSHU0Ob6+AyGr6nlBldBTB6/PVF6J7fwga9K48YMyZ0vjbHk+Po gufAUH6aYQoF2q4yeqg0mvnBzOAyRHIDmdJ9gwWnLdYwMgsTXh4VMMx8t 9AjlTijLTtk1qeRfPr2VF7Lg1wLegyBMNgwpV10y3Dbk3+tG49v/FuCf7 iU50/uTUSYLo3TsNrFTRpFZxpt96vlgN4YtYucdX4ol/eQc3B8xcGU9Mc lsc68Zi5Z1oANkfB/FG+kTuAkHAxSWEjHee9PQuZmbLmGuDOJKcUvpYZ/ WlyV9flYytD6/hQ44aEKwq6IqhogVfodnv5B1ZHp74aJlCZHch0CcD7OZ A==; X-IronPort-AV: E=McAfee;i="6600,9927,10995"; a="20751324" X-IronPort-AV: E=Sophos;i="6.06,185,1705392000"; d="scan'208";a="20751324" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Feb 2024 00:29:04 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.06,185,1705392000"; d="scan'208";a="6735062" Received: from ls.sc.intel.com (HELO localhost) ([172.25.112.31]) by fmviesa008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Feb 2024 00:29:03 -0800 From: isaku.yamahata@intel.com To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sean Christopherson , Sagi Shahar , Kai Huang , chen.bo@intel.com, hang.yuan@intel.com, tina.zhang@intel.com Subject: [PATCH v19 107/130] KVM: TDX: Handle TDX PV CPUID hypercall Date: Mon, 26 Feb 2024 00:26:49 -0800 Message-Id: <1999b2b095612e59746710e0a37f4caa466ee37f.1708933498.git.isaku.yamahata@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Isaku Yamahata Wire up TDX PV CPUID hypercall to the KVM backend function. Signed-off-by: Isaku Yamahata --- arch/x86/kvm/vmx/tdx.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c index 72dbe2ff9062..eb68d6c148b6 100644 --- a/arch/x86/kvm/vmx/tdx.c +++ b/arch/x86/kvm/vmx/tdx.c @@ -1110,12 +1110,34 @@ static int tdx_vp_vmcall_to_user(struct kvm_vcpu *vcpu) return 0; } +static int tdx_emulate_cpuid(struct kvm_vcpu *vcpu) +{ + u32 eax, ebx, ecx, edx; + + /* EAX and ECX for cpuid is stored in R12 and R13. */ + eax = tdvmcall_a0_read(vcpu); + ecx = tdvmcall_a1_read(vcpu); + + kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, false); + + tdvmcall_a0_write(vcpu, eax); + tdvmcall_a1_write(vcpu, ebx); + tdvmcall_a2_write(vcpu, ecx); + tdvmcall_a3_write(vcpu, edx); + + tdvmcall_set_return_code(vcpu, TDVMCALL_SUCCESS); + + return 1; +} + static int handle_tdvmcall(struct kvm_vcpu *vcpu) { if (tdvmcall_exit_type(vcpu)) return tdx_emulate_vmcall(vcpu); switch (tdvmcall_leaf(vcpu)) { + case EXIT_REASON_CPUID: + return tdx_emulate_cpuid(vcpu); default: break; }