From patchwork Mon Jan 22 23:54:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 13526545 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 909D285C72; Mon, 22 Jan 2024 23:56:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.55.52.120 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705967788; cv=none; b=NaxEyDUwabZbeG55qlXYIGx9w8KHh8FLYKFrdXgrQXR6rpz/VjpcTKlquKdy8gsPstUucqGQ9fCwhHg3IQhC/gmFXn8HXmjA/BkVZPHrh0lnPuYlsP8WWXUZsx0oAaMYmkVqCgGNn0xj+iLAsCvmONtsjt9wxPqLC+4h8hJfpss= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705967788; c=relaxed/simple; bh=mQZr50oZd1zGZ9zdzLiRaxROHqWGxdnzw4GmCfH1WNM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=EO0COQl3KX/CrTHaterEMi2BLtw63B0faCXaObNXfDsqK33IrUtcnlCyEu5Ib5/cAW0ftvG8oITGB8ke2D3Xi/oRixZPWJDOijy4BXdZZ7umkOiWs+wQMaRoGzxmKw8A/keMyGUxbrH9uKoEGKyYrZqFO+d+clPTXRPPaA6Q9RE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=JjVJepnt; arc=none smtp.client-ip=192.55.52.120 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="JjVJepnt" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1705967786; x=1737503786; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=mQZr50oZd1zGZ9zdzLiRaxROHqWGxdnzw4GmCfH1WNM=; b=JjVJepntXhH/0mom0tq5g+zS1Un4vLLo3feDf80NREoP//QfeirO+Z5e zqok3K/TzePmRbNGEIKDfuf5sH1WclLE8pyNxgiwtdugUV+oPKE8LsBEK c45OvK5vVqYS/rSpcA29EmclUAu5OqHYEhJhxmKL8jK/zhLUvhykRu5Xx 2A150duEul+Z/funnLZ2WZurs6zeObbaERCi+ZqNJtLmHUt64l5dGm5As lecXQ9I1NaXuG3svCX9SXBMYQGIgVoyek2By5GSC8jqMZsruRUHKg4SoI aDDKIcZ0xEirNlUdtKK6axJZbs61G8QvDd8V7K3XV42UOmMa9N6jqPIJJ A==; X-IronPort-AV: E=McAfee;i="6600,9927,10961"; a="400217970" X-IronPort-AV: E=Sophos;i="6.05,212,1701158400"; d="scan'208";a="400217970" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jan 2024 15:56:00 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,212,1701158400"; d="scan'208";a="27818054" Received: from ls.sc.intel.com (HELO localhost) ([172.25.112.31]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jan 2024 15:55:59 -0800 From: isaku.yamahata@intel.com To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sean Christopherson , Sagi Shahar , Kai Huang , chen.bo@intel.com, hang.yuan@intel.com, tina.zhang@intel.com Subject: [PATCH v18 120/121] RFC: KVM: x86, TDX: Add check for KVM_SET_CPUID2 Date: Mon, 22 Jan 2024 15:54:36 -0800 Message-Id: <1ecd5e51366d6154b31ca807d3bca0c0e8b4b1b8.1705965635.git.isaku.yamahata@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Isaku Yamahata Implement a hook of KVM_SET_CPUID2 for additional consistency check. Intel TDX or AMD SEV has a restriction on the value of cpuid. For example, some values must be the same between all vcpus. Check if the new values are consistent with the old values. The check is light because the cpuid consistency is very model specific and complicated. The user space VMM should set cpuid and MSRs consistently. Suggested-by: Sean Christopherson Link: https://lore.kernel.org/lkml/ZDiGpCkXOcCm074O@google.com/ Signed-off-by: Isaku Yamahata --- v18: - Use TDH.SYS.RD() instead of struct tdsysinfo_struct --- arch/x86/kvm/vmx/main.c | 10 ++++++ arch/x86/kvm/vmx/tdx.c | 66 ++++++++++++++++++++++++++++++++++---- arch/x86/kvm/vmx/tdx.h | 7 ++++ arch/x86/kvm/vmx/x86_ops.h | 4 +++ 4 files changed, 81 insertions(+), 6 deletions(-) diff --git a/arch/x86/kvm/vmx/main.c b/arch/x86/kvm/vmx/main.c index dd2859328593..c7452274b387 100644 --- a/arch/x86/kvm/vmx/main.c +++ b/arch/x86/kvm/vmx/main.c @@ -447,6 +447,15 @@ static void vt_vcpu_deliver_init(struct kvm_vcpu *vcpu) kvm_vcpu_deliver_init(vcpu); } +static int vt_vcpu_check_cpuid(struct kvm_vcpu *vcpu, + struct kvm_cpuid_entry2 *e2, int nent) +{ + if (is_td_vcpu(vcpu)) + return tdx_vcpu_check_cpuid(vcpu, e2, nent); + + return 0; +} + static void vt_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu) { if (is_td_vcpu(vcpu)) @@ -1107,6 +1116,7 @@ struct kvm_x86_ops vt_x86_ops __initdata = { .get_exit_info = vt_get_exit_info, + .vcpu_check_cpuid = vt_vcpu_check_cpuid, .vcpu_after_set_cpuid = vt_vcpu_after_set_cpuid, .has_wbinvd_exit = cpu_has_vmx_wbinvd_exit, diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c index 475a913ef25e..67bb0c4c73a7 100644 --- a/arch/x86/kvm/vmx/tdx.c +++ b/arch/x86/kvm/vmx/tdx.c @@ -590,6 +590,9 @@ void tdx_vm_free(struct kvm *kvm) free_page((unsigned long)__va(kvm_tdx->tdr_pa)); kvm_tdx->tdr_pa = 0; + + kfree(kvm_tdx->cpuid); + kvm_tdx->cpuid = NULL; } static int tdx_do_tdh_mng_key_config(void *param) @@ -711,6 +714,39 @@ int tdx_vcpu_create(struct kvm_vcpu *vcpu) return 0; } +int tdx_vcpu_check_cpuid(struct kvm_vcpu *vcpu, struct kvm_cpuid_entry2 *e2, int nent) +{ + struct kvm_tdx *kvm_tdx = to_kvm_tdx(vcpu->kvm); + int i; + + /* + * Simple check that new cpuid is consistent with created one. + * For simplicity, only trivial check. Don't try comprehensive checks + * with the cpuid virtualization table in the TDX module spec. + */ + for (i = 0; i < tdx_info->num_cpuid_config; i++) { + const struct kvm_tdx_cpuid_config *c = &tdx_info->cpuid_configs[i]; + u32 index = c->sub_leaf == KVM_TDX_CPUID_NO_SUBLEAF ? 0 : c->sub_leaf; + const struct kvm_cpuid_entry2 *old = + kvm_find_cpuid_entry2(kvm_tdx->cpuid, kvm_tdx->cpuid_nent, + c->leaf, index); + const struct kvm_cpuid_entry2 *new = kvm_find_cpuid_entry2(e2, nent, + c->leaf, index); + + if (!!old != !!new) + return -EINVAL; + if (!old && !new) + continue; + + if ((old->eax ^ new->eax) & c->eax || + (old->ebx ^ new->ebx) & c->ebx || + (old->ecx ^ new->ecx) & c->ecx || + (old->edx ^ new->edx) & c->edx) + return -EINVAL; + } + return 0; +} + void tdx_vcpu_load(struct kvm_vcpu *vcpu, int cpu) { struct vcpu_tdx *tdx = to_tdx(vcpu); @@ -2251,9 +2287,10 @@ static int setup_tdparams_eptp_controls(struct kvm_cpuid2 *cpuid, return 0; } -static void setup_tdparams_cpuids(struct kvm_cpuid2 *cpuid, +static void setup_tdparams_cpuids(struct kvm *kvm, struct kvm_cpuid2 *cpuid, struct td_params *td_params) { + struct kvm_tdx *kvm_tdx = to_kvm_tdx(kvm); int i; /* @@ -2261,6 +2298,7 @@ static void setup_tdparams_cpuids(struct kvm_cpuid2 *cpuid, * be same to the one of struct tdsysinfo.{num_cpuid_config, cpuid_configs} * It's assumed that td_params was zeroed. */ + kvm_tdx->cpuid_nent = 0; for (i = 0; i < tdx_info->num_cpuid_config; i++) { const struct kvm_tdx_cpuid_config *c = &tdx_info->cpuid_configs[i]; /* KVM_TDX_CPUID_NO_SUBLEAF means index = 0. */ @@ -2283,6 +2321,10 @@ static void setup_tdparams_cpuids(struct kvm_cpuid2 *cpuid, value->ebx = entry->ebx & c->ebx; value->ecx = entry->ecx & c->ecx; value->edx = entry->edx & c->edx; + + /* Remember the setting to check for KVM_SET_CPUID2. */ + kvm_tdx->cpuid[kvm_tdx->cpuid_nent] = *entry; + kvm_tdx->cpuid_nent++; } } @@ -2369,7 +2411,7 @@ static int setup_tdparams(struct kvm *kvm, struct td_params *td_params, ret = setup_tdparams_eptp_controls(cpuid, td_params); if (ret) return ret; - setup_tdparams_cpuids(cpuid, td_params); + setup_tdparams_cpuids(kvm, cpuid, td_params); ret = setup_tdparams_xfam(cpuid, td_params); if (ret) return ret; @@ -2593,11 +2635,18 @@ static int tdx_td_init(struct kvm *kvm, struct kvm_tdx_cmd *cmd) if (cmd->flags) return -EINVAL; - init_vm = kzalloc(sizeof(*init_vm) + - sizeof(init_vm->cpuid.entries[0]) * KVM_MAX_CPUID_ENTRIES, - GFP_KERNEL); - if (!init_vm) + WARN_ON_ONCE(kvm_tdx->cpuid); + kvm_tdx->cpuid = kzalloc(flex_array_size(init_vm, cpuid.entries, KVM_MAX_CPUID_ENTRIES), + GFP_KERNEL); + if (!kvm_tdx->cpuid) return -ENOMEM; + + init_vm = kzalloc(struct_size(init_vm, cpuid.entries, KVM_MAX_CPUID_ENTRIES), + GFP_KERNEL); + if (!init_vm) { + ret = -ENOMEM; + goto out; + } if (copy_from_user(init_vm, (void __user *)cmd->data, sizeof(*init_vm))) { ret = -EFAULT; goto out; @@ -2647,6 +2696,11 @@ static int tdx_td_init(struct kvm *kvm, struct kvm_tdx_cmd *cmd) out: /* kfree() accepts NULL. */ + if (ret) { + kfree(kvm_tdx->cpuid); + kvm_tdx->cpuid = NULL; + kvm_tdx->cpuid_nent = 0; + } kfree(init_vm); kfree(td_params); return ret; diff --git a/arch/x86/kvm/vmx/tdx.h b/arch/x86/kvm/vmx/tdx.h index 21cf9cafdf69..6991aced1a4e 100644 --- a/arch/x86/kvm/vmx/tdx.h +++ b/arch/x86/kvm/vmx/tdx.h @@ -32,6 +32,13 @@ struct kvm_tdx { atomic_t tdh_mem_track; u64 tsc_offset; + + /* + * For KVM_SET_CPUID to check consistency. Remember the one passed to + * TDH.MNG_INIT + */ + int cpuid_nent; + struct kvm_cpuid_entry2 *cpuid; }; union tdx_exit_reason { diff --git a/arch/x86/kvm/vmx/x86_ops.h b/arch/x86/kvm/vmx/x86_ops.h index a43784c3a4c6..6c4976fce9b8 100644 --- a/arch/x86/kvm/vmx/x86_ops.h +++ b/arch/x86/kvm/vmx/x86_ops.h @@ -162,6 +162,8 @@ u8 tdx_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); void tdx_deliver_interrupt(struct kvm_lapic *apic, int delivery_mode, int trig_mode, int vector); +int tdx_vcpu_check_cpuid(struct kvm_vcpu *vcpu, struct kvm_cpuid_entry2 *e2, + int nent); void tdx_inject_nmi(struct kvm_vcpu *vcpu); void tdx_get_exit_info(struct kvm_vcpu *vcpu, u32 *reason, u64 *info1, u64 *info2, u32 *intr_info, u32 *error_code); @@ -214,6 +216,8 @@ static inline u8 tdx_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio) static inline void tdx_deliver_interrupt(struct kvm_lapic *apic, int delivery_mode, int trig_mode, int vector) {} +static inline int tdx_vcpu_check_cpuid(struct kvm_vcpu *vcpu, struct kvm_cpuid_entry2 *e2, + int nent) { return -EOPNOTSUPP; } static inline void tdx_inject_nmi(struct kvm_vcpu *vcpu) {} static inline void tdx_get_exit_info(struct kvm_vcpu *vcpu, u32 *reason, u64 *info1, u64 *info2, u32 *intr_info, u32 *error_code) {}