[1/4] Fix GPE registers read/write handling.

Commit Message

Gleb Natapov Feb. 5, 2009, 1:42 p.m. UTC

For STS register bit are cleared by writing 1 into it.

Signed-off-by: Gleb Natapov <[e-mail]>
---

 qemu/hw/acpi.c |   43 +++++++++++++++++++++++++++++++------------
 1 files changed, 31 insertions(+), 12 deletions(-)


--
To unsubscribe from this list: send the line "unsubscribe kvm" in
the body of a message to [e-mail]
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Comments

Avi Kivity Feb. 9, 2009, 1:58 p.m. UTC | #1

Gleb Natapov wrote:
> For STS register bit are cleared by writing 1 into it.
>
>   

Patchset looks good; however this is a touchy area.  Marcelo or glommer, 
can you also review it?

Glauber Costa Feb. 10, 2009, 1:52 p.m. UTC | #2

On Mon, Feb 09, 2009 at 03:58:52PM +0200, Avi Kivity wrote:
> Gleb Natapov wrote:
>> For STS register bit are cleared by writing 1 into it.
>>
>>   
>
> Patchset looks good; however this is a touchy area.  Marcelo or glommer,  
> can you also review it?
I took a look at the first version, and aside for the comments that have
already been addressed, it seemed fine to me.

--
To unsubscribe from this list: send the line "unsubscribe kvm" in
the body of a message to [e-mail]
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Avi Kivity Feb. 11, 2009, 12:14 p.m. UTC | #3

Gleb Natapov wrote:
> For STS register bit are cleared by writing 1 into it.
>
>   

Applied all four, thanks.

Patch

diff --git a/qemu/hw/acpi.c b/qemu/hw/acpi.c
index b998225..7074166 100644
--- a/qemu/hw/acpi.c
+++ b/qemu/hw/acpi.c
@@ -590,6 +590,13 @@  struct pci_status {
 static struct gpe_regs gpe;
 static struct pci_status pci0_status;
 
+static uint32_t gpe_read_val(uint16_t val, uint32_t addr)
+{
+    if (addr & 1)
+        return (val >> 8) & 0xff;
+    return val & 0xff;
+}
+
 static uint32_t gpe_readb(void *opaque, uint32_t addr)
 {
     uint32_t val = 0;
@@ -603,16 +610,12 @@  static uint32_t gpe_readb(void *opaque, uint32_t addr)
             break;
 
         case GPE_BASE:
-            val = g->sts & 0xFF;
-            break;
         case GPE_BASE + 1:
-            val =  (g->sts >> 8) & 0xFF;
+            val = gpe_read_val(g->sts, addr);
             break;
         case GPE_BASE + 2:
-            val =  g->en & 0xFF;
-            break;
         case GPE_BASE + 3:
-            val =  (g->en >> 8) & 0xFF;
+            val = gpe_read_val(g->en, addr);
             break;
         default:
             break;
@@ -624,6 +627,26 @@  static uint32_t gpe_readb(void *opaque, uint32_t addr)
     return val;
 }
 
+static void gpe_write_val(uint16_t *cur, int addr, uint32_t val)
+{
+    if (addr & 1)
+        *cur = (*cur & 0xff) | (val << 8);
+    else
+        *cur = (*cur & 0xff00) | (val & 0xff);
+}
+
+static void gpe_reset_val(uint16_t *cur, int addr, uint32_t val)
+{
+    uint16_t x1, x0 = val & 0xff;
+    int shift = (addr & 1) ? 8 : 0;
+
+    x1 = (*cur >> shift) & 0xff;
+
+    x1 = x1 & ~x0;
+
+    *cur = (*cur & (0xff << (8 - shift))) | (x1 << shift);
+}
+
 static void gpe_writeb(void *opaque, uint32_t addr, uint32_t val)
 {
     struct gpe_regs *g = opaque;
@@ -636,16 +659,12 @@  static void gpe_writeb(void *opaque, uint32_t addr, uint32_t val)
             break;
 
         case GPE_BASE:
-            g->sts = (g->sts & ~0xFFFF) | (val & 0xFFFF);
-            break;
         case GPE_BASE + 1:
-            g->sts = (g->sts & 0xFFFF) | (val << 8);
+            gpe_reset_val(&g->sts, addr, val);
             break;
         case GPE_BASE + 2:
-            g->en = (g->en & ~0xFFFF) | (val & 0xFFFF);
-            break;
         case GPE_BASE + 3:
-            g->en = (g->en & 0xFFFF) | (val << 8);
+            gpe_write_val(&g->en, addr, val);
             break;
         default:
             break;