diff --git a/hw/apic.c b/hw/apic.c
index d686b51..8f512df 100644
--- a/hw/apic.c
+++ b/hw/apic.c
@@ -21,6 +21,7 @@
 #include "qemu-timer.h"
 #include "host-utils.h"
 #include "sysbus.h"
+#include "pc.h"
 
 //#define DEBUG_APIC
 //#define DEBUG_COALESCING
@@ -119,6 +120,7 @@ struct APICState {
     int wait_for_sipi;
 };
 
+static uint8_t vector_to_gsi_map[256] = { 0xff };
 static APICState *local_apics[MAX_APICS + 1];
 static int apic_irq_delivered;
 
@@ -308,6 +310,15 @@ void apic_deliver_irq(uint8_t dest, uint8_t dest_mode,
                      trigger_mode);
 }
 
+void apic_deliver_ioapic_irq(uint8_t dest, uint8_t dest_mode,
+                             uint8_t delivery_mode, uint8_t vector_num,
+                             uint8_t polarity, uint8_t trigger_mode, int gsi)
+{
+    vector_to_gsi_map[vector_num] = gsi;
+    apic_deliver_irq(dest, dest_mode, delivery_mode,
+                     vector_num, polarity, trigger_mode);
+}
+
 void cpu_set_apic_base(DeviceState *d, uint64_t val)
 {
     APICState *s = DO_UPCAST(APICState, busdev.qdev, d);
@@ -432,8 +443,11 @@ static void apic_eoi(APICState *s)
     if (isrv < 0)
         return;
     reset_bit(s->isr, isrv);
-    /* XXX: send the EOI packet to the APIC bus to allow the I/O APIC to
-            set the remote IRR bit for level triggered interrupts. */
+  
+    if (vector_to_gsi_map[isrv] != 0xff) {
+        ioapic_eoi(vector_to_gsi_map[isrv]);
+        vector_to_gsi_map[isrv] = 0xff;
+    }
     apic_update_irq(s);
 }
 
diff --git a/hw/apic.h b/hw/apic.h
index 8a0c9d0..59d0e37 100644
--- a/hw/apic.h
+++ b/hw/apic.h
@@ -8,6 +8,10 @@ void apic_deliver_irq(uint8_t dest, uint8_t dest_mode,
                              uint8_t delivery_mode,
                              uint8_t vector_num, uint8_t polarity,
                              uint8_t trigger_mode);
+void apic_deliver_ioapic_irq(uint8_t dest, uint8_t dest_mode,
+                             uint8_t delivery_mode,
+                             uint8_t vector_num, uint8_t polarity,
+                             uint8_t trigger_mode, int gsi);
 int apic_accept_pic_intr(DeviceState *s);
 void apic_deliver_pic_intr(DeviceState *s, int level);
 int apic_get_interrupt(DeviceState *s);
diff --git a/hw/ioapic.c b/hw/ioapic.c
index 5ae21e9..1e2fc2e 100644
--- a/hw/ioapic.c
+++ b/hw/ioapic.c
@@ -26,6 +26,7 @@
 #include "qemu-timer.h"
 #include "host-utils.h"
 #include "sysbus.h"
+#include "qlist.h"
 
 //#define DEBUG_IOAPIC
 
@@ -61,6 +62,30 @@ struct IOAPICState {
     uint64_t ioredtbl[IOAPIC_NUM_PINS];
 };
 
+static QLIST_HEAD(ioapic_eoi_client_list,
+                  ioapic_eoi_client) ioapic_eoi_client_list =
+                  QLIST_HEAD_INITIALIZER(ioapic_eoi_client_list);
+
+void ioapic_register_eoi_client(ioapic_eoi_client *client)
+{
+    QLIST_INSERT_HEAD(&ioapic_eoi_client_list, client, list);
+}
+
+void ioapic_unregister_eoi_client(ioapic_eoi_client *client)
+{
+    QLIST_REMOVE(client, list);
+}
+
+void ioapic_eoi(int gsi)
+{
+    ioapic_eoi_client *client;
+    QLIST_FOREACH(client, &ioapic_eoi_client_list, list) {
+        if (client->irq == gsi) {
+            client->eoi(client);
+        }
+    }
+}
+
 static void ioapic_service(IOAPICState *s)
 {
     uint8_t i;
@@ -90,8 +115,8 @@ static void ioapic_service(IOAPICState *s)
                 else
                     vector = entry & 0xff;
 
-                apic_deliver_irq(dest, dest_mode, delivery_mode,
-                                 vector, polarity, trig_mode);
+                apic_deliver_ioapic_irq(dest, dest_mode, delivery_mode,
+                                        vector, polarity, trig_mode, i);
             }
         }
     }
diff --git a/hw/pc.h b/hw/pc.h
index 63b0249..a88019f 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -48,8 +48,18 @@ typedef struct isa_irq_state {
 
 void isa_irq_handler(void *opaque, int n, int level);
 
-/* i8254.c */
+struct ioapic_eoi_client;
+typedef struct ioapic_eoi_client ioapic_eoi_client;
+struct ioapic_eoi_client {
+    void (*eoi)(struct ioapic_eoi_client *client);
+    int irq;
+    QLIST_ENTRY(ioapic_eoi_client) list;
+};
+void ioapic_register_eoi_client(ioapic_eoi_client *client);
+void ioapic_unregister_eoi_client(ioapic_eoi_client *client);
+void ioapic_eoi(int gsi);
 
+/* i8254.c */
 #define PIT_FREQ 1193182
 
 typedef struct PITState PITState;
