From patchwork Mon Jan 3 15:19:07 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rik van Riel X-Patchwork-Id: 448241 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p03FK7B5014865 for ; Mon, 3 Jan 2011 15:20:10 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932122Ab1ACPTi (ORCPT ); Mon, 3 Jan 2011 10:19:38 -0500 Received: from mx1.redhat.com ([209.132.183.28]:52529 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932077Ab1ACPTh (ORCPT ); Mon, 3 Jan 2011 10:19:37 -0500 Received: from int-mx12.intmail.prod.int.phx2.redhat.com (int-mx12.intmail.prod.int.phx2.redhat.com [10.5.11.25]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id p03FJBlu026454 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Mon, 3 Jan 2011 10:19:12 -0500 Received: from annuminas.surriel.com (ovpn-113-70.phx2.redhat.com [10.3.113.70]) by int-mx12.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id p03FJAN9007885; Mon, 3 Jan 2011 10:19:10 -0500 Date: Mon, 3 Jan 2011 10:19:07 -0500 From: Rik van Riel To: linux-kernel@vger.kernel.org Cc: kvm@vger.kernel.org, avi@redhat.com, mtosatti@redhat.com, edwin.zhai@intel.com Subject: [PATCH] increase ple_gap default to 64 Message-ID: <20110103101907.2926ecca@annuminas.surriel.com> Organization: Red Hat, Inc. Mime-Version: 1.0 X-Scanned-By: MIMEDefang 2.68 on 10.5.11.25 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Mon, 03 Jan 2011 15:20:12 +0000 (UTC) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 81fcbe9..0e38b8e 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -90,14 +90,14 @@ module_param(vmm_exclusive, bool, S_IRUGO); * These 2 parameters are used to config the controls for Pause-Loop Exiting: * ple_gap: upper bound on the amount of time between two successive * executions of PAUSE in a loop. Also indicate if ple enabled. - * According to test, this time is usually small than 41 cycles. + * According to test, this time is usually smaller than 64 cycles. * ple_window: upper bound on the amount of time a guest is allowed to execute * in a PAUSE loop. Tests indicate that most spinlocks are held for * less than 2^12 cycles * Time is measured based on a counter that runs at the same rate as the TSC, * refer SDM volume 3b section 21.6.13 & 22.1.3. */ -#define KVM_VMX_DEFAULT_PLE_GAP 41 +#define KVM_VMX_DEFAULT_PLE_GAP 64 #define KVM_VMX_DEFAULT_PLE_WINDOW 4096 static int ple_gap = KVM_VMX_DEFAULT_PLE_GAP; module_param(ple_gap, int, S_IRUGO);