From patchwork Sun Mar 13 15:19:07 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Takuya Yoshikawa X-Patchwork-Id: 631771 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p2DFJGSE004867 for ; Sun, 13 Mar 2011 15:19:16 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753110Ab1CMPTN (ORCPT ); Sun, 13 Mar 2011 11:19:13 -0400 Received: from mail-yw0-f46.google.com ([209.85.213.46]:47285 "EHLO mail-yw0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752723Ab1CMPTM (ORCPT ); Sun, 13 Mar 2011 11:19:12 -0400 Received: by ywj3 with SMTP id 3so1757835ywj.19 for ; Sun, 13 Mar 2011 08:19:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:date:from:to:cc:subject:message-id:in-reply-to :references:x-mailer:mime-version:content-type :content-transfer-encoding; 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x86_64-pc-linux-gnu) Mime-Version: 1.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Sun, 13 Mar 2011 15:19:16 +0000 (UTC) diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c index bd9572a..fcc49ef 100644 --- a/arch/x86/kvm/emulate.c +++ b/arch/x86/kvm/emulate.c @@ -2188,6 +2188,67 @@ static int em_push(struct x86_emulate_ctxt *ctxt) return X86EMUL_CONTINUE; } +static int em_push_es(struct x86_emulate_ctxt *ctxt) +{ + emulate_push_sreg(ctxt, ctxt->ops, VCPU_SREG_ES); + return X86EMUL_CONTINUE; +} + +static int em_push_cs(struct x86_emulate_ctxt *ctxt) +{ + emulate_push_sreg(ctxt, ctxt->ops, VCPU_SREG_CS); + return X86EMUL_CONTINUE; +} + +static int em_push_ss(struct x86_emulate_ctxt *ctxt) +{ + emulate_push_sreg(ctxt, ctxt->ops, VCPU_SREG_SS); + return X86EMUL_CONTINUE; +} + +static int em_push_ds(struct x86_emulate_ctxt *ctxt) +{ + emulate_push_sreg(ctxt, ctxt->ops, VCPU_SREG_DS); + return X86EMUL_CONTINUE; +} + +static int em_push_fs(struct x86_emulate_ctxt *ctxt) +{ + emulate_push_sreg(ctxt, ctxt->ops, VCPU_SREG_FS); + return X86EMUL_CONTINUE; +} + +static int em_push_gs(struct x86_emulate_ctxt *ctxt) +{ + emulate_push_sreg(ctxt, ctxt->ops, VCPU_SREG_GS); + return X86EMUL_CONTINUE; +} + +static int em_pop_es(struct x86_emulate_ctxt *ctxt) +{ + return emulate_pop_sreg(ctxt, ctxt->ops, VCPU_SREG_ES); +} + +static int em_pop_ss(struct x86_emulate_ctxt *ctxt) +{ + return emulate_pop_sreg(ctxt, ctxt->ops, VCPU_SREG_SS); +} + +static int em_pop_ds(struct x86_emulate_ctxt *ctxt) +{ + return emulate_pop_sreg(ctxt, ctxt->ops, VCPU_SREG_DS); +} + +static int em_pop_fs(struct x86_emulate_ctxt *ctxt) +{ + return emulate_pop_sreg(ctxt, ctxt->ops, VCPU_SREG_FS); +} + +static int em_pop_gs(struct x86_emulate_ctxt *ctxt) +{ + return emulate_pop_sreg(ctxt, ctxt->ops, VCPU_SREG_GS); +} + static int em_das(struct x86_emulate_ctxt *ctxt) { struct decode_cache *c = &ctxt->decode; @@ -2471,16 +2532,19 @@ static struct opcode group11[] = { static struct opcode opcode_table[256] = { /* 0x00 - 0x07 */ I6ALU(Lock, em_add), - D(ImplicitOps | Stack | No64), D(ImplicitOps | Stack | No64), + I(ImplicitOps | Stack | No64, em_push_es), + I(ImplicitOps | Stack | No64, em_pop_es), /* 0x08 - 0x0F */ I6ALU(Lock, em_or), - D(ImplicitOps | Stack | No64), N, + I(ImplicitOps | Stack | No64, em_push_cs), N, /* 0x10 - 0x17 */ I6ALU(Lock, em_adc), - D(ImplicitOps | Stack | No64), D(ImplicitOps | Stack | No64), + I(ImplicitOps | Stack | No64, em_push_ss), + I(ImplicitOps | Stack | No64, em_pop_ss), /* 0x18 - 0x1F */ I6ALU(Lock, em_sbb), - D(ImplicitOps | Stack | No64), D(ImplicitOps | Stack | No64), + I(ImplicitOps | Stack | No64, em_push_ds), + I(ImplicitOps | Stack | No64, em_pop_ds), /* 0x20 - 0x27 */ I6ALU(Lock, em_and), N, N, /* 0x28 - 0x2F */ @@ -2600,12 +2664,14 @@ static struct opcode twobyte_table[256] = { /* 0x90 - 0x9F */ X16(D(ByteOp | DstMem | SrcNone | ModRM| Mov)), /* 0xA0 - 0xA7 */ - D(ImplicitOps | Stack), D(ImplicitOps | Stack), + I(ImplicitOps | Stack, em_push_fs), + I(ImplicitOps | Stack, em_pop_fs), N, D(DstMem | SrcReg | ModRM | BitOp), D(DstMem | SrcReg | Src2ImmByte | ModRM), D(DstMem | SrcReg | Src2CL | ModRM), N, N, /* 0xA8 - 0xAF */ - D(ImplicitOps | Stack), D(ImplicitOps | Stack), + I(ImplicitOps | Stack, em_push_gs), + I(ImplicitOps | Stack, em_pop_gs), N, D(DstMem | SrcReg | ModRM | BitOp | Lock), D(DstMem | SrcReg | Src2ImmByte | ModRM), D(DstMem | SrcReg | Src2CL | ModRM), @@ -3109,27 +3175,6 @@ special_insn: goto twobyte_insn; switch (c->b) { - case 0x06: /* push es */ - emulate_push_sreg(ctxt, ops, VCPU_SREG_ES); - break; - case 0x07: /* pop es */ - rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_ES); - break; - case 0x0e: /* push cs */ - emulate_push_sreg(ctxt, ops, VCPU_SREG_CS); - break; - case 0x16: /* push ss */ - emulate_push_sreg(ctxt, ops, VCPU_SREG_SS); - break; - case 0x17: /* pop ss */ - rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_SS); - break; - case 0x1e: /* push ds */ - emulate_push_sreg(ctxt, ops, VCPU_SREG_DS); - break; - case 0x1f: /* pop ds */ - rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_DS); - break; case 0x40 ... 0x47: /* inc r16/r32 */ emulate_1op("inc", c->dst, ctxt->eflags); break; @@ -3627,12 +3672,6 @@ twobyte_insn: case 0x90 ... 0x9f: /* setcc r/m8 */ c->dst.val = test_cc(c->b, ctxt->eflags); break; - case 0xa0: /* push fs */ - emulate_push_sreg(ctxt, ops, VCPU_SREG_FS); - break; - case 0xa1: /* pop fs */ - rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_FS); - break; case 0xa3: bt: /* bt */ c->dst.type = OP_NONE; @@ -3644,12 +3683,6 @@ twobyte_insn: case 0xa5: /* shld cl, r, r/m */ emulate_2op_cl("shld", c->src2, c->src, c->dst, ctxt->eflags); break; - case 0xa8: /* push gs */ - emulate_push_sreg(ctxt, ops, VCPU_SREG_GS); - break; - case 0xa9: /* pop gs */ - rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_GS); - break; case 0xab: bts: /* bts */ emulate_2op_SrcV_nobyte("bts", c->src, c->dst, ctxt->eflags);