From patchwork Thu Jul 21 16:39:52 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Donald Dutile X-Patchwork-Id: 996152 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p6LHU7xw028418 for ; Thu, 21 Jul 2011 17:30:07 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753322Ab1GURaD (ORCPT ); Thu, 21 Jul 2011 13:30:03 -0400 Received: from mx1.redhat.com ([209.132.183.28]:16894 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751678Ab1GURaB (ORCPT ); Thu, 21 Jul 2011 13:30:01 -0400 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p6LHTwfu020263 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Thu, 21 Jul 2011 13:30:01 -0400 Received: from dddsys0.bos.redhat.com (dddsys0.bos.redhat.com [10.16.16.40]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id p6LGdqMK031352; Thu, 21 Jul 2011 12:39:52 -0400 From: Donald Dutile Subject: [PATCH V2] device-assignment pci: correct pci config size default for cap version 2 endpoints To: kvm@vger.kernel.org Cc: alex.williamson@redhat.com, mst@redhat.com Date: Thu, 21 Jul 2011 12:39:52 -0400 Message-ID: <20110721163733.661.22067.stgit@dddsys0.bos.redhat.com> User-Agent: StGIT/0.14.3 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.68 on 10.5.11.22 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Thu, 21 Jul 2011 17:30:07 +0000 (UTC) v2: do local boundary check with respect to legacy PCI header length, and don't depend on it in pci_add_capability(). : fix compilation, and change else>2 to simple else for all other cases. Doing device assignement using a PCIe device with it's PCI Cap structure at offset 0xcc showed a problem in the default size mapped for this cap-id. The failure caused a corruption which might have gone unnoticed otherwise. Fix assigned_device_pci_cap_init() to set the default size of PCIe Cap structure (cap-id 0x10) to 0x34 instead of 0x3c. 0x34 is default, min, for endpoint device with a cap version of 2. Add check in assigned_devic_pci_cap_init() to ensure size of Cap structure doesn't exceed legacy PCI header space, which is where it must fit. Signed-off-by: Donald Dutile cc: Alex Williamson cc: Michael S. Tsirkin --- hw/device-assignment.c | 19 ++++++++++++++++--- 1 files changed, 16 insertions(+), 3 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/hw/device-assignment.c b/hw/device-assignment.c index 36ad6b0..6bb8af7 100644 --- a/hw/device-assignment.c +++ b/hw/device-assignment.c @@ -1419,21 +1419,34 @@ static int assigned_device_pci_cap_init(PCIDevice *pci_dev) } if ((pos = pci_find_cap_offset(pci_dev, PCI_CAP_ID_EXP, 0))) { - uint8_t version; + uint8_t version, size; uint16_t type, devctl, lnkcap, lnksta; uint32_t devcap; - int size = 0x3c; /* version 2 size */ version = pci_get_byte(pci_dev->config + pos + PCI_EXP_FLAGS); version &= PCI_EXP_FLAGS_VERS; if (version == 1) { size = 0x14; - } else if (version > 2) { + } else if (version == 2) { + /* don't include slot cap/stat/ctrl 2 regs; only support endpoints */ + size = 0x34; + } else { fprintf(stderr, "Unsupported PCI express capability version %d\n", version); return -EINVAL; } + /* make sure cap struct resides in legacy hdr space */ + if (size > PCI_CONFIG_SPACE_SIZE - pos) { + fprintf(stderr, "ERROR: %04x:%02x:%02x.%x " + "Attempt to add PCI Cap Structure 0x%x at offset 0x%x," + "size 0x%x, which exceeds legacy PCI config space 0x%x\n", + pci_find_domain(pci_dev->bus), pci_bus_num(pci_dev->bus), + PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn), + PCI_CAP_ID_EXP, pos, size, PCI_CONFIG_SPACE_SIZE); + return -EINVAL; + } + if ((ret = pci_add_capability(pci_dev, PCI_CAP_ID_EXP, pos, size)) < 0) { return ret;