From patchwork Tue Mar 24 14:03:04 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?UmFkaW0gS3LEjW3DocWZ?= X-Patchwork-Id: 6079231 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 5FF879F2A9 for ; Tue, 24 Mar 2015 14:03:22 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 86B582024D for ; Tue, 24 Mar 2015 14:03:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 667FD20225 for ; Tue, 24 Mar 2015 14:03:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752362AbbCXODN (ORCPT ); Tue, 24 Mar 2015 10:03:13 -0400 Received: from mx1.redhat.com ([209.132.183.28]:43946 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752189AbbCXODM (ORCPT ); Tue, 24 Mar 2015 10:03:12 -0400 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id t2OE38pW011812 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 24 Mar 2015 10:03:08 -0400 Received: from potion (dhcp-1-126.brq.redhat.com [10.34.1.126]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with SMTP id t2OE353Y025348; Tue, 24 Mar 2015 10:03:05 -0400 Received: by potion (sSMTP sendmail emulation); Tue, 24 Mar 2015 15:03:04 +0100 Date: Tue, 24 Mar 2015 15:03:04 +0100 From: Radim =?utf-8?B?S3LEjW3DocWZ?= To: James Sullivan Cc: Marcelo Tosatti , kvm@vger.kernel.org, gleb@kernel.org, pbonzini@redhat.com Subject: Re: [Patch v5] x86: irq_comm: Add check for RH bit in kvm_set_msi_irq Message-ID: <20150324140301.GD21522@potion.brq.redhat.com> References: <20150318225225.GA8702@amt.cnet> <550A1F6A.6030602@gmail.com> <20150319010932.GA18338@amt.cnet> <20150319130015.GA16070@potion.brq.redhat.com> <550B5309.1090805@gmail.com> <20150320151534.GB14772@potion.brq.redhat.com> <550C3B23.30401@gmail.com> <550C5DD7.5050306@gmail.com> <20150323211331.GA21710@potion.brq.redhat.com> <551097AF.4000303@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <551097AF.4000303@gmail.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.26 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-5.9 required=5.0 tests=BAYES_00,HK_RANDOM_FROM, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP 2015-03-23 16:46-0600, James Sullivan: > On 03/23/2015 03:13 PM, Radim Kr?má? wrote: > > I meant if the delivery mode from data register isn't ignored with RH=1, > > and the message delivered as if lowest-priority was set there. > > (Decided by having something else than fixed or lowest-priority there.) > > > > Hmm, any thoughts on how I could test for that? Set the MSI data register's delivery mode to NMI/SMI/... The change below fails => hardware honors delivery mode. I tested it and Linux got a lot of unexpected NMIs, so the emulation in your latest patch looks correct. --- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/x86/include/asm/msidef.h b/arch/x86/include/asm/msidef.h index 4cc48af23fef..2270e459186b 100644 --- a/arch/x86/include/asm/msidef.h +++ b/arch/x86/include/asm/msidef.h @@ -17,6 +17,7 @@ #define MSI_DATA_DELIVERY_MODE_SHIFT 8 #define MSI_DATA_DELIVERY_FIXED (0 << MSI_DATA_DELIVERY_MODE_SHIFT) #define MSI_DATA_DELIVERY_LOWPRI (1 << MSI_DATA_DELIVERY_MODE_SHIFT) +#define MSI_DATA_DELIVERY_NMI (4 << MSI_DATA_DELIVERY_MODE_SHIFT) #define MSI_DATA_LEVEL_SHIFT 14 #define MSI_DATA_LEVEL_DEASSERT (0 << MSI_DATA_LEVEL_SHIFT) diff --git a/arch/x86/kernel/apic/msi.c b/arch/x86/kernel/apic/msi.c index d6ba2d660dc5..4f71737c34eb 100644 --- a/arch/x86/kernel/apic/msi.c +++ b/arch/x86/kernel/apic/msi.c @@ -46,7 +46,7 @@ void native_compose_msi_msg(struct pci_dev *pdev, MSI_DATA_LEVEL_ASSERT | ((apic->irq_delivery_mode != dest_LowestPrio) ? MSI_DATA_DELIVERY_FIXED : - MSI_DATA_DELIVERY_LOWPRI) | + MSI_DATA_DELIVERY_NMI) | MSI_DATA_VECTOR(cfg->vector); }