From patchwork Wed Jul 20 17:04:35 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 9240037 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4404060871 for ; Wed, 20 Jul 2016 17:04:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2DC5E27D5E for ; Wed, 20 Jul 2016 17:04:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1FB9127D5D; Wed, 20 Jul 2016 17:04:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C46EE27D5D for ; Wed, 20 Jul 2016 17:04:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754898AbcGTREh (ORCPT ); Wed, 20 Jul 2016 13:04:37 -0400 Received: from foss.arm.com ([217.140.101.70]:43677 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754797AbcGTREK (ORCPT ); Wed, 20 Jul 2016 13:04:10 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F2DC0BFB; Wed, 20 Jul 2016 10:05:20 -0700 (PDT) Received: from e104803-lin.lan (unknown [10.1.207.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4C48B3F387; Wed, 20 Jul 2016 10:04:09 -0700 (PDT) From: Andre Przywara To: Will Deacon , Marc Zyngier Cc: kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v7 15/15] arm: gic: allow 32-bit compilation Date: Wed, 20 Jul 2016 18:04:35 +0100 Message-Id: <20160720170435.28090-16-andre.przywara@arm.com> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20160720170435.28090-1-andre.przywara@arm.com> References: <20160720170435.28090-1-andre.przywara@arm.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The ARM GIC code is shared between ARM and arm64, though the header files from the Linux kernel are actually different, reflecting the different level of GIC emulation support between the two architectures. Since it is conceivable that ARM will gain GICv3 (and possibly ITS) emulation support too, lets conditionally define those missing symbols in the source file until an upcoming ARM header update eventually includes those. Signed-off-by: Andre Przywara --- arm/gic.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arm/gic.c b/arm/gic.c index 7fd0768..cd4f518 100644 --- a/arm/gic.c +++ b/arm/gic.c @@ -19,6 +19,14 @@ #define KVM_VGIC_V3_ADDR_TYPE_REDIST 3 #endif +#ifndef KVM_VGIC_ITS_ADDR_TYPE +#define KVM_VGIC_ITS_ADDR_TYPE 4 +#endif + +#ifndef KVM_VGIC_V3_ITS_SIZE +#define KVM_VGIC_V3_ITS_SIZE (2 * SZ_64K) +#endif + #define IRQCHIP_GIC 0 static int gic_fd = -1;