From patchwork Wed Aug 17 19:38:56 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoffer Dall X-Patchwork-Id: 9286431 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3AE90600CB for ; Wed, 17 Aug 2016 19:37:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2B91D29374 for ; Wed, 17 Aug 2016 19:37:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 204B92938B; Wed, 17 Aug 2016 19:37:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AF59429374 for ; Wed, 17 Aug 2016 19:37:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753786AbcHQThR (ORCPT ); Wed, 17 Aug 2016 15:37:17 -0400 Received: from mail-wm0-f43.google.com ([74.125.82.43]:38551 "EHLO mail-wm0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753065AbcHQThJ (ORCPT ); Wed, 17 Aug 2016 15:37:09 -0400 Received: by mail-wm0-f43.google.com with SMTP id o80so2075206wme.1 for ; Wed, 17 Aug 2016 12:37:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=fPWHNzltvoBaXi5CM49J9X1oKZoc5nUfjMfkTdiF5IM=; b=bZYK3orFsVFFaoVMivl8+WM5V89yLNr6sVC12VZvd4EMBABCI0J5MMqm5IK5bcuLBs jjbBZ8uw1I1WLYgYm/1avGWWASWbhty4U7iLcNFVocrtNX1gq1LdpQ0lAsuuXIx95FDn SLJrKC3LFcAqOhM5Qt6jdSf32ynSj+/obEpr8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=fPWHNzltvoBaXi5CM49J9X1oKZoc5nUfjMfkTdiF5IM=; b=hsMIB/Tw/A29bTaLll7yC3afianyesRu6K/9Bt/hruyFfhBgyM3EYmVIzmgVNcDzF1 hrtzDD1MbRNGvdiWKFyI+JeNGBX4aLB+UUWN7ecWyDELsVwpBh3eOqmbsLLkhzrS/sxM l5Dks1pTnJ3B7uUslyCf1RaE8Xc91EG6xqjZzKJMnbA6t0IHUf0tWZ7csreGkSpsYsoh SQ7uyXXlotUIEedUnDkp+DqkFzFEBHMJs4EEnjxXna5MvRjDe7qzifbj4fYRg5no5pKD X+qpgR4GFer/OfhyzUT1N34OsD3hmspLEo1mf7OMjIPHufIxly8VTsWtTCabbUkzholt ps2Q== X-Gm-Message-State: AEkoouvvWBhBd3Jy32JDEf6Vi++ctZmO1vB4hxKOmRoR9ZikLWZnfenKzfv5d/tDEEf8OTOH X-Received: by 10.194.227.228 with SMTP id sd4mr43558754wjc.127.1471462628036; Wed, 17 Aug 2016 12:37:08 -0700 (PDT) Received: from localhost.localdomain ([94.18.191.146]) by smtp.gmail.com with ESMTPSA id jv9sm26185622wjb.45.2016.08.17.12.37.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 17 Aug 2016 12:37:07 -0700 (PDT) From: Christoffer Dall To: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Cc: Marc Zyngier , kvm@vger.kernel.org, Christoffer Dall Subject: [PULL 09/12] arm64: Document workaround for Cortex-A72 erratum #853709 Date: Wed, 17 Aug 2016 21:38:56 +0200 Message-Id: <20160817193859.15726-10-christoffer.dall@linaro.org> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20160817193859.15726-1-christoffer.dall@linaro.org> References: <20160817193859.15726-1-christoffer.dall@linaro.org> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Marc Zyngier We already have a workaround for Cortex-A57 erratum #852523, but Cortex-A72 r0p0 to r0p2 do suffer from the same issue (known as erratum #853709). Let's document the fact that we already handle this. Acked-by: Will Deacon Signed-off-by: Marc Zyngier Signed-off-by: Christoffer Dall --- Documentation/arm64/silicon-errata.txt | 1 + arch/arm64/kvm/hyp/switch.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/arm64/silicon-errata.txt b/Documentation/arm64/silicon-errata.txt index 4da60b4..ccc6032 100644 --- a/Documentation/arm64/silicon-errata.txt +++ b/Documentation/arm64/silicon-errata.txt @@ -53,6 +53,7 @@ stable kernels. | ARM | Cortex-A57 | #832075 | ARM64_ERRATUM_832075 | | ARM | Cortex-A57 | #852523 | N/A | | ARM | Cortex-A57 | #834220 | ARM64_ERRATUM_834220 | +| ARM | Cortex-A72 | #853709 | N/A | | ARM | MMU-500 | #841119,#826419 | N/A | | | | | | | Cavium | ThunderX ITS | #22375, #24313 | CAVIUM_ERRATUM_22375 | diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c index ae7855f..5a84b45 100644 --- a/arch/arm64/kvm/hyp/switch.c +++ b/arch/arm64/kvm/hyp/switch.c @@ -256,7 +256,7 @@ static int __hyp_text __guest_run(struct kvm_vcpu *vcpu) /* * We must restore the 32-bit state before the sysregs, thanks - * to Cortex-A57 erratum #852523. + * to erratum #852523 (Cortex-A57) or #853709 (Cortex-A72). */ __sysreg32_restore_state(vcpu); __sysreg_restore_guest_state(guest_ctxt);