From patchwork Tue Sep 27 18:05:56 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoffer Dall X-Patchwork-Id: 9352523 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id F201D6086A for ; Tue, 27 Sep 2016 18:07:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E88102925B for ; Tue, 27 Sep 2016 18:07:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DD3592926D; Tue, 27 Sep 2016 18:07:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 674FD29260 for ; Tue, 27 Sep 2016 18:07:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S964912AbcI0SHl (ORCPT ); Tue, 27 Sep 2016 14:07:41 -0400 Received: from mail-wm0-f49.google.com ([74.125.82.49]:35990 "EHLO mail-wm0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933939AbcI0SGh (ORCPT ); Tue, 27 Sep 2016 14:06:37 -0400 Received: by mail-wm0-f49.google.com with SMTP id w84so190379203wmg.1 for ; Tue, 27 Sep 2016 11:06:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=nkZWFaM/o49omti0WyKFZmJIJbS9OE5X5APFGrHj3rI=; b=Mbsahco0ZwlwqNDRtythkgb6rrJEeVUIMgqaINaMv/+xaR1smcGCzviMMTW+66Oyx+ p2QE94KELJvoynNXd5HVKVcMYJd4HSxjq8aIvaWlnh65ABAncbAHZV1jxRgyappdYXwl yqmCDu032mcwerF0Qub3FXCg4aZ5eCP75+kIQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=nkZWFaM/o49omti0WyKFZmJIJbS9OE5X5APFGrHj3rI=; b=S8K5NzkobyVEkLYS57xE1RJ6xGf3R74WpN21Gz4hGv0DlDH5/chOeVwBObq/OsiGUL RmqVJfc3ztIGgkKBUp4ShLiT6iYDmAE3CRAgygMZOff+NbOqWBJ8h3N612ZQazHiJNb9 qZmunNf9TF3oYeTzO9PfbdyGrpPkiWcRtW1iCDr1y6CzaXPCky+T9bK2mxMZHEqTpvQ0 vUv7yaA0koXTi998440Xwx/qkW0sbTXGRz/3BZApqx3LQZtswK7DKaBWHl40xTxo2I7y 72f0NqOfT9lfPBNl2nm55K6LnoWJCWpdGkBfAETYbLT6Vh12bwk5TNR8Qq+vC9xyaiWM nsFg== X-Gm-Message-State: AA6/9Rnxwo9Af9fho/BGQ2yIxMAIKdaj/JVEE5ijq4fEkybVBvgq7CR+I+y0OpJlJCggEC6+ X-Received: by 10.194.103.138 with SMTP id fw10mr23873372wjb.93.1474999595333; Tue, 27 Sep 2016 11:06:35 -0700 (PDT) Received: from localhost.localdomain ([94.18.191.146]) by smtp.gmail.com with ESMTPSA id k2sm17932539wmg.23.2016.09.27.11.06.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 27 Sep 2016 11:06:34 -0700 (PDT) From: Christoffer Dall To: Paolo Bonzini , =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= Cc: Marc Zyngier , kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PULL 48/50] ARM: gic-v3: Work around definition of gic_write_bpr1 Date: Tue, 27 Sep 2016 20:05:56 +0200 Message-Id: <20160927180558.14699-49-christoffer.dall@linaro.org> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20160927180558.14699-1-christoffer.dall@linaro.org> References: <20160927180558.14699-1-christoffer.dall@linaro.org> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Marc Zyngier A new accessor for gic_write_bpr1 is added to arch_gicv3.h in 4.9, whilst the CP15 accessors are redifined in a separate branch. This leads to a horrible clash, where the new accessor ends up with a crap "asm volatile" definition. Work around this by carrying our own definition of gic_write_bpr1, creating a small conflict which will be obvious to resolve. Signed-off-by: Marc Zyngier --- arch/arm/include/asm/arch_gicv3.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/include/asm/arch_gicv3.h b/arch/arm/include/asm/arch_gicv3.h index 996848e..1fee657 100644 --- a/arch/arm/include/asm/arch_gicv3.h +++ b/arch/arm/include/asm/arch_gicv3.h @@ -216,6 +216,15 @@ static inline void gic_write_sre(u32 val) isb(); } +static inline void gic_write_bpr1(u32 val) +{ +#if defined(__write_sysreg) && defined(ICC_BPR1) + write_sysreg(val, ICC_BPR1); +#else + asm volatile("mcr " __stringify(ICC_BPR1) : : "r" (val)); +#endif +} + /* * Even in 32bit systems that use LPAE, there is no guarantee that the I/O * interface provides true 64bit atomic accesses, so using strd/ldrd doesn't