diff mbox

[v2,2/3] KVM: VMX: join functions that disable x2apic msr intercepts

Message ID 20160929204133.1259-3-rkrcmar@redhat.com (mailing list archive)
State New, archived
Headers show

Commit Message

Radim Krčmář Sept. 29, 2016, 8:41 p.m. UTC 
vmx_disable_intercept_msr_read_x2apic() and
vmx_disable_intercept_msr_write_x2apic() differed only in the type.
Pass the type to a new function.

Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
---
 arch/x86/kvm/vmx.c | 36 ++++++++++--------------------------
 1 file changed, 10 insertions(+), 26 deletions(-)

Comments

Paolo Bonzini Sept. 30, 2016, 8:29 a.m. UTC | #1 
On 29/09/2016 22:41, Radim Krčmář wrote:
>  	for (msr = 0x800; msr <= 0x8ff; msr++) {
>  		if (msr == 0x839 /* TMCCT */)
>  			continue;
> -		vmx_disable_intercept_msr_read_x2apic(msr, true);
> +		vmx_disable_intercept_msr_x2apic(msr, MSR_TYPE_R, true);
>  	}
>  
>  	/* TPR */
> -	vmx_disable_intercept_msr_write_x2apic(0x808, true);
> +	vmx_disable_intercept_msr_x2apic(0x808, MSR_TYPE_W, true);
>  	/* EOI */
> -	vmx_disable_intercept_msr_write_x2apic(0x80b, true);
> +	vmx_disable_intercept_msr_x2apic(0x80b, MSR_TYPE_W, true);
>  	/* SELF-IPI */
> -	vmx_disable_intercept_msr_write_x2apic(0x83f, true);
> +	vmx_disable_intercept_msr_x2apic(0x83f, MSR_TYPE_W, true);
>  
>  	/*
>  	 * (enable_apicv && !kvm_vcpu_apicv_active()) ||
>  	 * 	!enable_apicv
>  	 */
>  	/* TPR */
> -	vmx_disable_intercept_msr_read_x2apic(0x808, false);
> -	vmx_disable_intercept_msr_write_x2apic(0x808, false);
> +	vmx_disable_intercept_msr_x2apic(0x808, MSR_TYPE_R | MSR_TYPE_W, false);

Alternatively you could place the two function calls for 0x808 together:

 	for (msr = 0x800; msr <= 0x8ff; msr++)
		vmx_disable_intercept_msr_x2apic(msr, MSR_TYPE_R, true);

 	/*
	 * TPR reads and writes can be virtualized even if virtual interrupt delivery
         * is not in use.
	 */
	vmx_disable_intercept_msr_x2apic(0x808, MSR_TYPE_R | MSR_TYPE_W, false);
	vmx_disable_intercept_msr_x2apic(0x808, MSR_TYPE_W, true);

	/* EOI */
	vmx_disable_intercept_msr_x2apic(0x80b, MSR_TYPE_W, true);

 	/* SELF-IPI */
	vmx_disable_intercept_msr_x2apic(0x83f, MSR_TYPE_W, true);

Paolo
--
To unsubscribe from this list: send the line "unsubscribe kvm" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff mbox

Patch

diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 7ea77f0731f4..159cc65755ec 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -4656,33 +4656,18 @@  static void vmx_disable_intercept_for_msr(u32 msr, bool longmode_only)
 						msr, MSR_TYPE_R | MSR_TYPE_W);
 }
 
-static void vmx_disable_intercept_msr_read_x2apic(u32 msr, bool apicv_active)
+static void vmx_disable_intercept_msr_x2apic(u32 msr, int type, bool apicv_active)
 {
 	if (apicv_active) {
 		__vmx_disable_intercept_for_msr(vmx_msr_bitmap_legacy_x2apic_apicv,
-				msr, MSR_TYPE_R);
+				msr, type);
 		__vmx_disable_intercept_for_msr(vmx_msr_bitmap_longmode_x2apic_apicv,
-				msr, MSR_TYPE_R);
+				msr, type);
 	} else {
 		__vmx_disable_intercept_for_msr(vmx_msr_bitmap_legacy_x2apic,
-				msr, MSR_TYPE_R);
+				msr, type);
 		__vmx_disable_intercept_for_msr(vmx_msr_bitmap_longmode_x2apic,
-				msr, MSR_TYPE_R);
-	}
-}
-
-static void vmx_disable_intercept_msr_write_x2apic(u32 msr, bool apicv_active)
-{
-	if (apicv_active) {
-		__vmx_disable_intercept_for_msr(vmx_msr_bitmap_legacy_x2apic_apicv,
-				msr, MSR_TYPE_W);
-		__vmx_disable_intercept_for_msr(vmx_msr_bitmap_longmode_x2apic_apicv,
-				msr, MSR_TYPE_W);
-	} else {
-		__vmx_disable_intercept_for_msr(vmx_msr_bitmap_legacy_x2apic,
-				msr, MSR_TYPE_W);
-		__vmx_disable_intercept_for_msr(vmx_msr_bitmap_longmode_x2apic,
-				msr, MSR_TYPE_W);
+				msr, type);
 	}
 }
 
@@ -6469,23 +6454,22 @@  static __init int hardware_setup(void)
 	for (msr = 0x800; msr <= 0x8ff; msr++) {
 		if (msr == 0x839 /* TMCCT */)
 			continue;
-		vmx_disable_intercept_msr_read_x2apic(msr, true);
+		vmx_disable_intercept_msr_x2apic(msr, MSR_TYPE_R, true);
 	}
 
 	/* TPR */
-	vmx_disable_intercept_msr_write_x2apic(0x808, true);
+	vmx_disable_intercept_msr_x2apic(0x808, MSR_TYPE_W, true);
 	/* EOI */
-	vmx_disable_intercept_msr_write_x2apic(0x80b, true);
+	vmx_disable_intercept_msr_x2apic(0x80b, MSR_TYPE_W, true);
 	/* SELF-IPI */
-	vmx_disable_intercept_msr_write_x2apic(0x83f, true);
+	vmx_disable_intercept_msr_x2apic(0x83f, MSR_TYPE_W, true);
 
 	/*
 	 * (enable_apicv && !kvm_vcpu_apicv_active()) ||
 	 * 	!enable_apicv
 	 */
 	/* TPR */
-	vmx_disable_intercept_msr_read_x2apic(0x808, false);
-	vmx_disable_intercept_msr_write_x2apic(0x808, false);
+	vmx_disable_intercept_msr_x2apic(0x808, MSR_TYPE_R | MSR_TYPE_W, false);
 
 	if (enable_ept) {
 		kvm_mmu_set_mask_ptes(VMX_EPT_READABLE_MASK,