From patchwork Thu Nov 10 00:35:43 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Lendacky X-Patchwork-Id: 9420411 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A6CEB601C0 for ; Thu, 10 Nov 2016 00:50:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 96F192927F for ; Thu, 10 Nov 2016 00:50:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 897CB2939B; Thu, 10 Nov 2016 00:50:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E65392927F for ; Thu, 10 Nov 2016 00:50:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754586AbcKJAuL (ORCPT ); Wed, 9 Nov 2016 19:50:11 -0500 Received: from mail-bl2nam02on0048.outbound.protection.outlook.com ([104.47.38.48]:42515 "EHLO NAM02-BL2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754500AbcKJAuG (ORCPT ); Wed, 9 Nov 2016 19:50:06 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector1-amd-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=w+EJgwENBOtRhht6Jac9/jV/6elasbp8BUUVgO4IhM4=; b=zSOlhygrjEvXGmMIEZCtNBYL6f5barV9m4jnTINESKkAuZWED4MQuUJ2K1sZwkDIsrSINANb1dXuQbXoAO/vP/uzJ2m+N2JTvAR+qjUZe592LfOTrrI3cTa4x09YpdczyfXScmzf8wfI29JZ7TmY74Ug+b7QYn1wuAjREOh7pu0= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Thomas.Lendacky@amd.com; Received: from tlendack-t1.amdoffice.net (165.204.77.1) by BN6PR12MB1139.namprd12.prod.outlook.com (10.168.226.141) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.707.6; Thu, 10 Nov 2016 00:35:46 +0000 From: Tom Lendacky Subject: [RFC PATCH v3 06/20] x86: Add support to enable SME during early boot processing To: , , , , , , , , CC: Rik van Riel , Radim =?utf-8?b?S3LEjW3DocWZ?= , Arnd Bergmann , Jonathan Corbet , Matt Fleming , Joerg Roedel , Konrad Rzeszutek Wilk , "Paolo Bonzini" , Larry Woodman , "Ingo Molnar" , Borislav Petkov , Andy Lutomirski , "H. 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20:nB892+kid4TtFCEMrjbLBHT6b/PMcp642erwzv69d6oSy0hBQuAC0xU8x4wehxUZ/C7RTWwkMQ0ekkQwYsWA77YgLIYdOlRiQGQsVDGXanDz8TlkhD3jElrWLX4jyjEXE5BSmqFRmyS8W2AqAL+PxAfoVFpRS9yuTafllMh877Sty2t/2D8RvLPBJeMWasvNRGeeDmHNJuP7AvyBjOMtIvfsT02+6SLBTkqKbO7eNlz0soaIYhrCl4P/irPObgm/ X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Nov 2016 00:35:46.5874 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR12MB1139 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds support to the early boot code to use Secure Memory Encryption (SME). Support is added to update the early pagetables with the memory encryption mask and to encrypt the kernel in place. The routines to set the encryption mask and perform the encryption are stub routines for now with full function to be added in a later patch. Signed-off-by: Tom Lendacky --- arch/x86/kernel/Makefile | 2 ++ arch/x86/kernel/head_64.S | 35 ++++++++++++++++++++++++++++++++++- arch/x86/kernel/mem_encrypt_init.c | 29 +++++++++++++++++++++++++++++ 3 files changed, 65 insertions(+), 1 deletion(-) create mode 100644 arch/x86/kernel/mem_encrypt_init.c -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile index 45257cf..27e22f4 100644 --- a/arch/x86/kernel/Makefile +++ b/arch/x86/kernel/Makefile @@ -141,4 +141,6 @@ ifeq ($(CONFIG_X86_64),y) obj-$(CONFIG_PCI_MMCONFIG) += mmconf-fam10h_64.o obj-y += vsmp_64.o + + obj-y += mem_encrypt_init.o endif diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S index c98a559..9a28aad 100644 --- a/arch/x86/kernel/head_64.S +++ b/arch/x86/kernel/head_64.S @@ -95,6 +95,17 @@ startup_64: jnz bad_address /* + * Enable Secure Memory Encryption (if available). Save the mask + * in %r12 for later use and add the memory encryption mask to %rbp + * to include it in the page table fixups. + */ + push %rsi + call sme_enable + pop %rsi + movq %rax, %r12 + addq %r12, %rbp + + /* * Fixup the physical addresses in the page table */ addq %rbp, early_level4_pgt + (L4_START_KERNEL*8)(%rip) @@ -117,6 +128,7 @@ startup_64: shrq $PGDIR_SHIFT, %rax leaq (4096 + _KERNPG_TABLE)(%rbx), %rdx + addq %r12, %rdx movq %rdx, 0(%rbx,%rax,8) movq %rdx, 8(%rbx,%rax,8) @@ -133,6 +145,7 @@ startup_64: movq %rdi, %rax shrq $PMD_SHIFT, %rdi addq $(__PAGE_KERNEL_LARGE_EXEC & ~_PAGE_GLOBAL), %rax + addq %r12, %rax leaq (_end - 1)(%rip), %rcx shrq $PMD_SHIFT, %rcx subq %rdi, %rcx @@ -163,9 +176,21 @@ startup_64: cmp %r8, %rdi jne 1b - /* Fixup phys_base */ + /* + * Fixup phys_base, remove the memory encryption mask from %rbp + * to obtain the true physical address. + */ + subq %r12, %rbp addq %rbp, phys_base(%rip) + /* + * The page tables have been updated with the memory encryption mask, + * so encrypt the kernel if memory encryption is active + */ + push %rsi + call sme_encrypt_kernel + pop %rsi + movq $(early_level4_pgt - __START_KERNEL_map), %rax jmp 1f ENTRY(secondary_startup_64) @@ -186,9 +211,17 @@ ENTRY(secondary_startup_64) /* Sanitize CPU configuration */ call verify_cpu + push %rsi + call sme_get_me_mask + pop %rsi + movq %rax, %r12 + movq $(init_level4_pgt - __START_KERNEL_map), %rax 1: + /* Add the memory encryption mask to RAX */ + addq %r12, %rax + /* Enable PAE mode and PGE */ movl $(X86_CR4_PAE | X86_CR4_PGE), %ecx movq %rcx, %cr4 diff --git a/arch/x86/kernel/mem_encrypt_init.c b/arch/x86/kernel/mem_encrypt_init.c new file mode 100644 index 0000000..388d6fb --- /dev/null +++ b/arch/x86/kernel/mem_encrypt_init.c @@ -0,0 +1,29 @@ +/* + * AMD Memory Encryption Support + * + * Copyright (C) 2016 Advanced Micro Devices, Inc. + * + * Author: Tom Lendacky + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include + +void __init sme_encrypt_kernel(void) +{ +} + +unsigned long __init sme_get_me_mask(void) +{ + return sme_me_mask; +} + +unsigned long __init sme_enable(void) +{ + return sme_me_mask; +}