From patchwork Thu Dec 29 22:43:34 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christopher Covington X-Patchwork-Id: 9491655 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 36A5262AB9 for ; Thu, 29 Dec 2016 22:45:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 23E7225D99 for ; Thu, 29 Dec 2016 22:45:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 18B7F2018E; Thu, 29 Dec 2016 22:45:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C041A200F5 for ; Thu, 29 Dec 2016 22:45:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753294AbcL2Wov (ORCPT ); Thu, 29 Dec 2016 17:44:51 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:46646 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753159AbcL2Wnu (ORCPT ); Thu, 29 Dec 2016 17:43:50 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 2B1266145E; Thu, 29 Dec 2016 22:43:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1483051430; bh=6nCHXgL85G2nvstE8nTu+CIkcaqL3o+oNQaHNnvMeGo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VezmGSR2++JKEuPqPxfEIaO7EZrmJy+bP0ipdj+d2nYc0ZRp9HwctLDbvPrGPEM9d 6YuBPywS/OD8iOo6IsmxfdZV1bv9S8/jLDeDmeptRu+Igj0zAfxleNTLBdD+6LxyyX MZnbn7GcaX3mlR5L5DoPdNAvE+a1LRCs1C9A5uBs= Received: from illium.qualcomm.com (global_nat1_iad_fw.qualcomm.com [129.46.232.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: cov@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 1689F6137F; Thu, 29 Dec 2016 22:43:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1483051429; bh=6nCHXgL85G2nvstE8nTu+CIkcaqL3o+oNQaHNnvMeGo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JgS58IWjgPfa27QWI348/EwezvjwpY9AQzeGbwKdEq1NCMQ9EcOuwpOP76uSu1lYV 6x7YK5HjwtrikACe3HjxfI5NmH6jMy1OIqsZ1hEuO6JikZ3x5WBUx1X2D8/h9H67wp X9a1TtutyhnCCzXtwnqYAJIMCo2AKDyiCfeL3nXw= DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org 1689F6137F Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=cov@codeaurora.org From: Christopher Covington To: Paolo Bonzini , =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= , Christoffer Dall , Marc Zyngier , Catalin Marinas , Will Deacon , kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org, shankerd@codeaurora.org, timur@codeaurora.org Cc: Christopher Covington Subject: [PATCH v2 4/5] arm64: Use __tlbi_dsb() macros in KVM code Date: Thu, 29 Dec 2016 17:43:34 -0500 Message-Id: <20161229224335.13531-4-cov@codeaurora.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20161229224335.13531-1-cov@codeaurora.org> References: <20161229224335.13531-1-cov@codeaurora.org> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Refactor the KVM code to use the newly introduced __tlbi_dsb macros, which will allow an errata workaround that repeats tlbi dsb sequences to only change one location. This is not intended to change the generated assembly and comparing before and after vmlinux objdump shows no functional changes. Signed-off-by: Christopher Covington --- arch/arm64/kvm/hyp/tlb.c | 17 ++++++----------- 1 file changed, 6 insertions(+), 11 deletions(-) diff --git a/arch/arm64/kvm/hyp/tlb.c b/arch/arm64/kvm/hyp/tlb.c index 88e2f2b..66e3f72 100644 --- a/arch/arm64/kvm/hyp/tlb.c +++ b/arch/arm64/kvm/hyp/tlb.c @@ -16,6 +16,7 @@ */ #include +#include void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) { @@ -32,7 +33,7 @@ void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) * whole of Stage-1. Weep... */ ipa >>= 12; - asm volatile("tlbi ipas2e1is, %0" : : "r" (ipa)); + __tlbi_dsb(ipas2e1is, ish, ipa); /* * We have to ensure completion of the invalidation at Stage-2, @@ -40,9 +41,7 @@ void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) * complete (S1 + S2) walk based on the old Stage-2 mapping if * the Stage-1 invalidation happened first. */ - dsb(ish); - asm volatile("tlbi vmalle1is" : : ); - dsb(ish); + __tlbi_dsb(vmalle1is, ish); isb(); write_sysreg(0, vttbr_el2); @@ -57,8 +56,7 @@ void __hyp_text __kvm_tlb_flush_vmid(struct kvm *kvm) write_sysreg(kvm->arch.vttbr, vttbr_el2); isb(); - asm volatile("tlbi vmalls12e1is" : : ); - dsb(ish); + __tlbi_dsb(vmalls12e1is, ish); isb(); write_sysreg(0, vttbr_el2); @@ -72,8 +70,7 @@ void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu) write_sysreg(kvm->arch.vttbr, vttbr_el2); isb(); - asm volatile("tlbi vmalle1" : : ); - dsb(nsh); + __tlbi_dsb(vmalle1, nsh); isb(); write_sysreg(0, vttbr_el2); @@ -82,7 +79,5 @@ void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu) void __hyp_text __kvm_flush_vm_context(void) { dsb(ishst); - asm volatile("tlbi alle1is \n" - "ic ialluis ": : ); - dsb(ish); + __tlbi_asm_dsb("ic ialluis", alle1is, ish); }