From patchwork Fri Feb 3 14:56:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoffer Dall X-Patchwork-Id: 9554287 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 29AEF60424 for ; Fri, 3 Feb 2017 14:57:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0F8E627F95 for ; Fri, 3 Feb 2017 14:57:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 047AA283FC; Fri, 3 Feb 2017 14:57:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6E06927F95 for ; Fri, 3 Feb 2017 14:57:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752286AbdBCO5N (ORCPT ); Fri, 3 Feb 2017 09:57:13 -0500 Received: from mail-wm0-f46.google.com ([74.125.82.46]:35156 "EHLO mail-wm0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752281AbdBCO5F (ORCPT ); Fri, 3 Feb 2017 09:57:05 -0500 Received: by mail-wm0-f46.google.com with SMTP id b65so32810981wmf.0 for ; Fri, 03 Feb 2017 06:57:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=GO//G3AdYAoZRjSJkLrVfJwCj+dtvEpg58JrLu+20ek=; b=TZGvA1NbC8SRQAIk3QfiqiVgJgf6vI0Oa5YTYZliASpn68erjScavnbJQ77VjTPtJ0 OM+8iZGSS0DOvZD5g3rBD+ZQ4hGI1PGtdMXG6kzBLtGiM4hjkwT6HPaA1tLwKI894hGk 9cqYJQf7kyqb69dvyDA1SCMbCyoty3VonZ0tg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=GO//G3AdYAoZRjSJkLrVfJwCj+dtvEpg58JrLu+20ek=; b=ZIY6tj3UTFZOG0zjArrI1AnhpEjHRkYmv9x5OzqWiZbKoNonv9MzRD1sQDlKTb2GH0 NzqOTjgMpbOk/1WRcKNZHyCjMs4XFxvaOn9SGB+qQY7q5F62xWOCQbQwoHEQHPVBL9CJ rKX61qRnBOaGdaROfEkoWdHbIAv1zTv1KqKUzRu7fmeUmV/10OeGdpaetinFxoSaEDWa Kxo18FiqwwMoXe6Y5c8oMxOk2nXQrJcXJtf/5uOdFwQqVcplZbDfGJfSPK6U01jTj1fo qeZcd5p1UVC3DyRy9CbbZdF9cUbjljS04LziG3BZhhzVOfjAOLAu3kUAdYf0QMtuXEz7 mr3Q== X-Gm-Message-State: AMke39ncO1jtiGePGhng2h7K/0anjmK3o4BsKC4tCtPRyIqmjbLg6zlIC//yoVIh0A6BZRLw X-Received: by 10.28.174.14 with SMTP id x14mr1711837wme.75.1486133823600; Fri, 03 Feb 2017 06:57:03 -0800 (PST) Received: from localhost.localdomain ([217.61.220.40]) by smtp.gmail.com with ESMTPSA id n13sm45466469wrn.40.2017.02.03.06.57.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 03 Feb 2017 06:57:03 -0800 (PST) From: Christoffer Dall To: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Cc: kvm@vger.kernel.org, Marc Zyngier , Alexander Graf , Peter Maydell , Pekka Enberg , Christoffer Dall Subject: [PATCH v2 4/5] KVM: arm/arm64: Report PMU overflow interrupts to userspace irqchip Date: Fri, 3 Feb 2017 15:56:54 +0100 Message-Id: <20170203145655.15007-5-cdall@linaro.org> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20170203145655.15007-1-cdall@linaro.org> References: <20170203145655.15007-1-cdall@linaro.org> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Christoffer Dall When not using an in-kernel VGIC, but instead emulating an interrupt controller in userspace, we should report the PMU overflow status to that userspace interrupt controller using the KVM_CAP_ARM_USER_IRQ feature. Signed-off-by: Christoffer Dall --- arch/arm/kvm/arm.c | 9 ++++++--- include/kvm/arm_pmu.h | 7 +++++++ virt/kvm/arm/pmu.c | 42 ++++++++++++++++++++++++++++++++++++++---- 3 files changed, 51 insertions(+), 7 deletions(-) diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c index 505f928..92f38f6 100644 --- a/arch/arm/kvm/arm.c +++ b/arch/arm/kvm/arm.c @@ -628,11 +628,13 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run) /* * If we have a singal pending, or need to notify a userspace - * irqchip about timer level changes, then we exit (and update - * the timer level state in kvm_timer_update_run below). + * irqchip about timer or PMU level changes, then we exit (and + * update the timer level state in kvm_timer_update_run + * below). */ if (signal_pending(current) || - kvm_timer_should_notify_user(vcpu)) { + kvm_timer_should_notify_user(vcpu) || + kvm_pmu_should_notify_user(vcpu)) { ret = -EINTR; run->exit_reason = KVM_EXIT_INTR; } @@ -706,6 +708,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run) /* Tell userspace about in-kernel device output levels */ kvm_timer_update_run(vcpu); + kvm_pmu_update_run(vcpu); if (vcpu->sigset_active) sigprocmask(SIG_SETMASK, &sigsaved, NULL); diff --git a/include/kvm/arm_pmu.h b/include/kvm/arm_pmu.h index 92e7e97..1ab4633 100644 --- a/include/kvm/arm_pmu.h +++ b/include/kvm/arm_pmu.h @@ -50,6 +50,8 @@ void kvm_pmu_enable_counter(struct kvm_vcpu *vcpu, u64 val); void kvm_pmu_overflow_set(struct kvm_vcpu *vcpu, u64 val); void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu); void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu); +bool kvm_pmu_should_notify_user(struct kvm_vcpu *vcpu); +void kvm_pmu_update_run(struct kvm_vcpu *vcpu); void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val); void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val); void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u64 data, @@ -85,6 +87,11 @@ static inline void kvm_pmu_enable_counter(struct kvm_vcpu *vcpu, u64 val) {} static inline void kvm_pmu_overflow_set(struct kvm_vcpu *vcpu, u64 val) {} static inline void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu) {} static inline void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu) {} +static inline bool kvm_pmu_should_notify_user(struct kvm_vcpu *vcpu) +{ + return false; +} +static inline void kvm_pmu_update_run(struct kvm_vcpu *vcpu) {} static inline void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val) {} static inline void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val) {} static inline void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, diff --git a/virt/kvm/arm/pmu.c b/virt/kvm/arm/pmu.c index 69ccce3..51218be 100644 --- a/virt/kvm/arm/pmu.c +++ b/virt/kvm/arm/pmu.c @@ -230,13 +230,47 @@ static void kvm_pmu_update_state(struct kvm_vcpu *vcpu) return; overflow = !!kvm_pmu_overflow_status(vcpu); - if (pmu->irq_level != overflow) { - pmu->irq_level = overflow; - kvm_vgic_inject_irq(vcpu->kvm, vcpu->vcpu_id, - pmu->irq_num, overflow); + if (pmu->irq_level == overflow) + return; + + pmu->irq_level = overflow; + + if (likely(irqchip_in_kernel(vcpu->kvm))) { + int ret; + ret = kvm_vgic_inject_irq(vcpu->kvm, vcpu->vcpu_id, + pmu->irq_num, overflow); + WARN_ON(ret); } } +bool kvm_pmu_should_notify_user(struct kvm_vcpu *vcpu) +{ + struct kvm_pmu *pmu = &vcpu->arch.pmu; + struct kvm_sync_regs *sregs = &vcpu->run->s.regs; + bool run_level = sregs->device_irq_level & KVM_ARM_DEV_PMU; + + if (likely(irqchip_in_kernel(vcpu->kvm))) + return false; + + return pmu->irq_level != run_level; +} + +/* + * Reflect the PMU overflow interrupt output level into the kvm_run structure + */ +void kvm_pmu_update_run(struct kvm_vcpu *vcpu) +{ + struct kvm_sync_regs *regs = &vcpu->run->s.regs; + + if (likely(irqchip_in_kernel(vcpu->kvm))) + return; + + /* Populate the timer bitmap for user space */ + regs->device_irq_level &= ~KVM_ARM_DEV_PMU; + if (vcpu->arch.pmu.irq_level) + regs->device_irq_level |= KVM_ARM_DEV_PMU; +} + /** * kvm_pmu_flush_hwstate - flush pmu state to cpu * @vcpu: The vcpu pointer