From patchwork Fri Mar 31 17:54:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 9657043 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 22B0E60350 for ; Fri, 31 Mar 2017 17:57:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1748E286DE for ; Fri, 31 Mar 2017 17:57:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0C439286E1; Fri, 31 Mar 2017 17:57:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A6B26286DE for ; Fri, 31 Mar 2017 17:57:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933836AbdCaR5b (ORCPT ); Fri, 31 Mar 2017 13:57:31 -0400 Received: from foss.arm.com ([217.140.101.70]:34922 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933359AbdCaR50 (ORCPT ); Fri, 31 Mar 2017 13:57:26 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 83E6D15AD; Fri, 31 Mar 2017 10:57:25 -0700 (PDT) Received: from e106794-lin.cambridge.arm.com (e106794-lin.cambridge.arm.com [10.1.210.58]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id E3F973F59A; Fri, 31 Mar 2017 10:57:24 -0700 (PDT) From: Jean-Philippe Brucker To: kvm@vger.kernel.org Cc: will.deacon@arm.com, robin.murphy@arm.com Subject: [PATCH kvmtool 02/10] pci: allow to specify IRQ type for PCI devices Date: Fri, 31 Mar 2017 18:54:42 +0100 Message-Id: <20170331175450.24269-3-jean-philippe.brucker@arm.com> X-Mailer: git-send-email 2.12.1 In-Reply-To: <20170331175450.24269-1-jean-philippe.brucker@arm.com> References: <20170331175450.24269-1-jean-philippe.brucker@arm.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently all our virtual device interrupts are edge-triggered. But we're going to need level-triggered interrupts when passing physical devices. Let the device configure its interrupt kind. Keep edge as default, to avoid changing existing users. Signed-off-by: Jean-Philippe Brucker --- arm/pci.c | 3 ++- include/kvm/pci.h | 6 ++++++ pci.c | 3 +++ 3 files changed, 11 insertions(+), 1 deletion(-) diff --git a/arm/pci.c b/arm/pci.c index 813df26a..744b14c2 100644 --- a/arm/pci.c +++ b/arm/pci.c @@ -77,6 +77,7 @@ void pci__generate_fdt_nodes(void *fdt) u8 dev_num = dev_hdr->dev_num; u8 pin = pci_hdr->irq_pin; u8 irq = pci_hdr->irq_line; + u32 irq_flags = pci_hdr->irq_type; *entry = (struct of_interrupt_map_entry) { .pci_irq_mask = { @@ -93,7 +94,7 @@ void pci__generate_fdt_nodes(void *fdt) .gic_irq = { .type = cpu_to_fdt32(GIC_FDT_IRQ_TYPE_SPI), .num = cpu_to_fdt32(irq - GIC_SPI_IRQ_BASE), - .flags = cpu_to_fdt32(IRQ_TYPE_EDGE_RISING), + .flags = cpu_to_fdt32(irq_flags), }, }; diff --git a/include/kvm/pci.h b/include/kvm/pci.h index 56649d87..5d9c0f3b 100644 --- a/include/kvm/pci.h +++ b/include/kvm/pci.h @@ -9,6 +9,7 @@ #include "kvm/devices.h" #include "kvm/kvm.h" #include "kvm/msi.h" +#include "kvm/fdt.h" /* * PCI Configuration Mechanism #1 I/O ports. See Section 3.7.4.1. @@ -105,6 +106,11 @@ struct pci_device_header { /* Private to lkvm */ u32 bar_size[6]; struct pci_config_operations cfg_ops; + /* + * PCI INTx# are level-triggered, but virtual device often feature + * edge-triggered INTx# for convenience. + */ + enum irq_type irq_type; }; int pci__init(struct kvm *kvm); diff --git a/pci.c b/pci.c index 284cd40a..a18b117d 100644 --- a/pci.c +++ b/pci.c @@ -39,6 +39,9 @@ void pci__assign_irq(struct device_header *dev_hdr) */ pci_hdr->irq_pin = 1; pci_hdr->irq_line = irq__alloc_line(); + + if (!pci_hdr->irq_type) + pci_hdr->irq_type = IRQ_TYPE_EDGE_RISING; } static void *pci_config_address_ptr(u16 port)