From patchwork Wed May 3 18:32:58 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoffer Dall X-Patchwork-Id: 9710259 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 35D776021C for ; Wed, 3 May 2017 18:33:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2C57F28627 for ; Wed, 3 May 2017 18:33:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2109528650; Wed, 3 May 2017 18:33:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BF3B528627 for ; Wed, 3 May 2017 18:33:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752161AbdECSdK (ORCPT ); Wed, 3 May 2017 14:33:10 -0400 Received: from mail-wm0-f41.google.com ([74.125.82.41]:38227 "EHLO mail-wm0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751490AbdECSdG (ORCPT ); Wed, 3 May 2017 14:33:06 -0400 Received: by mail-wm0-f41.google.com with SMTP id r190so68485835wme.1 for ; Wed, 03 May 2017 11:33:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=aS2HAEzMp+OI3RI64xsoohCtfuHl6cA9AwfR1mXx3/o=; b=hr+OMRad3qEkFCnK6tSY6GVdyJDWhNfjvD9kJG09is+EXlMMBtuU9XY5HH8zgvq/CQ 2X8VmTNMzm89qlr3+jnxAfLRgp4U7AkR46//ZdGGoSobiYPYw4Ek11ENRFFIHeJ2WAAC gZjFxmwxWJBl/A+ch0GTUD7+40wFkw8uYEAzk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=aS2HAEzMp+OI3RI64xsoohCtfuHl6cA9AwfR1mXx3/o=; b=QVVZi4qfYX2JI5XZ3ou1Qsn3jgJVPjeMJBMFpZecTVO42cGd2c2FDWU2Ns+nt08P16 M1POShjR3rmbKG/VI8HMyN3DxTYocXACCE+BkAIDty58D0pln/oWiSLsBtXJ7QYRVJUU 99d12UlrYeUfslTMzdLWaMMInBus+4AZgdCEN5obAoBuw4/O/7NqN5VlrOqwpt4k1SGm 5NVoBuQ8DJXOimUqmCNT1PNK+oXqGGjRDe1TPLo3FI3eRELuDxmdb4A2F4s+A2AMksxo juQSyz0lDvmbq5OwUFoVbQqVjzqRm+LuSrx3ll9Ktg9s9CvDXRTU9UKZwV3Ebi9r4P9y Ftgg== X-Gm-Message-State: AN3rC/51kBBXsyCe/PRA0FCzh+0CA0eC9WBuFNPC8iTahII/E1Mqori5 7AOlLsD46HqEJC+o X-Received: by 10.80.146.109 with SMTP id j42mr27043218eda.17.1493836384896; Wed, 03 May 2017 11:33:04 -0700 (PDT) Received: from localhost.localdomain (xd93ddc2d.cust.hiper.dk. [217.61.220.45]) by smtp.gmail.com with ESMTPSA id x2sm10666038edb.49.2017.05.03.11.33.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 03 May 2017 11:33:04 -0700 (PDT) From: Christoffer Dall To: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Cc: kvm@vger.kernel.org, Marc Zyngier , Alexander Graf , Peter Maydell , Christoffer Dall Subject: [PATCH 3/5] KVM: arm/arm64: Move irq_is_ppi() to header file Date: Wed, 3 May 2017 20:32:58 +0200 Message-Id: <20170503183300.4618-4-cdall@linaro.org> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20170503183300.4618-1-cdall@linaro.org> References: <20170503183300.4618-1-cdall@linaro.org> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We are about to need this define in the arch timer code as well so move it to a common location. Signed-off-by: Christoffer Dall Acked-by: Marc Zyngier --- include/kvm/arm_vgic.h | 2 ++ virt/kvm/arm/pmu.c | 2 -- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h index 26ed4fb..1541f5d 100644 --- a/include/kvm/arm_vgic.h +++ b/include/kvm/arm_vgic.h @@ -38,6 +38,8 @@ #define VGIC_MIN_LPI 8192 #define KVM_IRQCHIP_NUM_PINS (1020 - 32) +#define irq_is_ppi(irq) ((irq) >= VGIC_NR_SGIS && (irq) < VGIC_NR_PRIVATE_IRQS) + enum vgic_type { VGIC_V2, /* Good ol' GICv2 */ VGIC_V3, /* New fancy GICv3 */ diff --git a/virt/kvm/arm/pmu.c b/virt/kvm/arm/pmu.c index f046b08..9b3e3ea 100644 --- a/virt/kvm/arm/pmu.c +++ b/virt/kvm/arm/pmu.c @@ -481,8 +481,6 @@ static int kvm_arm_pmu_v3_init(struct kvm_vcpu *vcpu) return 0; } -#define irq_is_ppi(irq) ((irq) >= VGIC_NR_SGIS && (irq) < VGIC_NR_PRIVATE_IRQS) - /* * For one VM the interrupt type must be same for each vcpu. * As a PPI, the interrupt number is the same for all vcpus,