From patchwork Thu May 18 16:02:06 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 9734719 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 334FB600CC for ; Thu, 18 May 2017 16:02:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1598828459 for ; Thu, 18 May 2017 16:02:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 06B2D27F54; Thu, 18 May 2017 16:02:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9D09827F54 for ; Thu, 18 May 2017 16:02:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932145AbdERQCP (ORCPT ); Thu, 18 May 2017 12:02:15 -0400 Received: from mail-wm0-f42.google.com ([74.125.82.42]:36493 "EHLO mail-wm0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754281AbdERQCN (ORCPT ); Thu, 18 May 2017 12:02:13 -0400 Received: by mail-wm0-f42.google.com with SMTP id 70so51884360wmq.1 for ; Thu, 18 May 2017 09:02:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jySG9OfnnQxoUYseoid6dEnzNNWt6VF6ubguMnoLyFs=; b=gQqECymzjm+kPPHKMNkAqrs6s5xqsOucMvf4HLWoK8BNHRyuvixHGLFY2RJxd6PQPO iNlp4TuwlPQlRkRmvgH/Fp4OSHrQktLaDxiu0A3N1C0om2OO6BNWId+FHHc5H7RHN2Bq n974zteoK1+cQO0BJ+MVWM2cOW4kc0T+W0CHY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jySG9OfnnQxoUYseoid6dEnzNNWt6VF6ubguMnoLyFs=; b=o6kkggA9xVm3IUzRrMy/THy7v6BQr/RrOUjXBn5FElzftJO5W6WLcWvj4jwajXbVed EqSfLwopWgzxi5txcIabW+4bGFEPOhl/UyY8r0SG0sBv5MffcFxNQJo13Xcx0Hz2KX74 ilWfvD82eHNmiW6ZbuYHxqE8bQ7sis2Q/n/yelsaMSv3wzOnhSmtoT63avaNu6SMKlcA jQ88iA8pkxgfBFeZkbGLKCL3zwYL6JOL1crTswAfFAH3y+9dzwNRjvNb2x/cPUALH2Ql igG2A1DBVpiC6BRiuWLgzQ07ZVTsWIuP+ub5dY27LPLpeWfXbigg9yloJdH+ozlXlnfO BRyA== X-Gm-Message-State: AODbwcB5SZiczFQulGbz3VbLb0E7vc0jFXZA9RnrkDZD99HN2HUJ32Xy rq0zlGCle7peJSzV X-Received: by 10.28.228.212 with SMTP id b203mr3685567wmh.119.1495123331408; Thu, 18 May 2017 09:02:11 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id n2sm6727631wmd.16.2017.05.18.09.02.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 18 May 2017 09:02:08 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id A314F3E04EF; Thu, 18 May 2017 17:02:08 +0100 (BST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: pbonzini@redhat.com Cc: marc.zyngier@arm.com, christoffer.dall@linaro.org, drjones@redhat.com, kvm@vger.kernel.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [kvm-unit-tests PATCH v2 1/3] sysregs: add __ACCESS_CP14 macro Date: Thu, 18 May 2017 17:02:06 +0100 Message-Id: <20170518160208.9674-2-alex.bennee@linaro.org> X-Mailer: git-send-email 2.13.0 In-Reply-To: <20170518160208.9674-1-alex.bennee@linaro.org> References: <20170518160208.9674-1-alex.bennee@linaro.org> MIME-Version: 1.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Alex Bennée Reviewed-by: Andrew Jones --- lib/arm/asm/sysreg.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/lib/arm/asm/sysreg.h b/lib/arm/asm/sysreg.h index 02dbe3d..9344968 100644 --- a/lib/arm/asm/sysreg.h +++ b/lib/arm/asm/sysreg.h @@ -42,6 +42,11 @@ #define __ACCESS_CP15_64(Op1, CRm) \ "mrrc", "mcrr", xstr(p15, Op1, %Q0, %R0, CRm), u64 +#define __ACCESS_CP14(CRn, Op1, CRm, Op2) \ + "mrc", "mcr", xstr(p14, Op1, %0, CRn, CRm, Op2), u32 +#define __ACCESS_CP14_64(Op1, CRm) \ + "mrrc", "mcrr", xstr(p14, Op1, %Q0, %R0, CRm), u64 + #define __read_sysreg(r, w, c, t) ({ \ t __val; \ asm volatile(r " " c : "=r" (__val)); \