From patchwork Thu Jun 22 07:55:50 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 9803749 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B8A2160386 for ; Thu, 22 Jun 2017 07:55:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AB8B428522 for ; Thu, 22 Jun 2017 07:55:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9FE6C28564; Thu, 22 Jun 2017 07:55:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 37D3A28522 for ; Thu, 22 Jun 2017 07:55:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751806AbdFVHz4 (ORCPT ); Thu, 22 Jun 2017 03:55:56 -0400 Received: from mx1.redhat.com ([209.132.183.28]:60746 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751116AbdFVHzz (ORCPT ); Thu, 22 Jun 2017 03:55:55 -0400 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 3C5A57F40C for ; Thu, 22 Jun 2017 07:55:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 3C5A57F40C Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=david@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 3C5A57F40C Received: from t460s.redhat.com (ovpn-117-93.ams2.redhat.com [10.36.117.93]) by smtp.corp.redhat.com (Postfix) with ESMTP id 8E786619D4; Thu, 22 Jun 2017 07:55:51 +0000 (UTC) From: David Hildenbrand To: kvm@vger.kernel.org Cc: Paolo Bonzini , =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= , Thomas Huth , david@redhat.com Subject: [kvm-unit-tests PATCH v1] s390x: add stidp interception test Date: Thu, 22 Jun 2017 09:55:50 +0200 Message-Id: <20170622075550.5307-1-david@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Thu, 22 Jun 2017 07:55:55 +0000 (UTC) Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Let's add a test case for the STORE CPU ID instruction. Signed-off-by: David Hildenbrand Reviewed-by: Thomas Huth --- lib/s390x/asm/arch_def.h | 8 ++++++++ s390x/intercept.c | 26 ++++++++++++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/lib/s390x/asm/arch_def.h b/lib/s390x/asm/arch_def.h index 07d467e..72e5c60 100644 --- a/lib/s390x/asm/arch_def.h +++ b/lib/s390x/asm/arch_def.h @@ -143,4 +143,12 @@ struct lowcore { #define PGM_INT_CODE_CRYPTO_OPERATION 0x119 #define PGM_INT_CODE_TX_ABORTED_EVENT 0x200 +struct cpuid { + uint64_t version : 8; + uint64_t id : 24; + uint64_t type : 16; + uint64_t format : 1; + uint64_t reserved : 15; +}; + #endif diff --git a/s390x/intercept.c b/s390x/intercept.c index 4558860..9766289 100644 --- a/s390x/intercept.c +++ b/s390x/intercept.c @@ -105,6 +105,31 @@ static void test_stap(void) check_pgm_int_code(PGM_INT_CODE_ADDRESSING); } +/* Test the STORE CPU ID instruction */ +static void test_stidp(void) +{ + struct cpuid id = {}; + + asm volatile ("stidp %0\n" : "+Q"(id)); + report("type set", id.type); + report("version valid", !id.version || id.version == 0xff); + report("reserved bits not set", !id.reserved); + + expect_pgm_int(); + low_prot_enable(); + asm volatile ("stidp 0(%0)\n" : : "r"(8)); + low_prot_disable(); + check_pgm_int_code(PGM_INT_CODE_PROTECTION); + + expect_pgm_int(); + asm volatile ("stidp 0(%0)\n" : : "r"(1)); + check_pgm_int_code(PGM_INT_CODE_SPECIFICATION); + + expect_pgm_int(); + asm volatile ("stidp 0(%0)\n" : : "r"(-8)); + check_pgm_int_code(PGM_INT_CODE_ADDRESSING); +} + /* Test the TEST BLOCK instruction */ static void test_testblock(void) { @@ -152,6 +177,7 @@ struct { { "stpx", test_stpx, false }, { "spx", test_spx, false }, { "stap", test_stap, false }, + { "stidp", test_stidp, false }, { "testblock", test_testblock, false }, { NULL, NULL, false } };