From patchwork Sat Aug 5 20:52:20 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 9883371 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6D9AF603FB for ; Sat, 5 Aug 2017 20:54:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5FC30286CC for ; Sat, 5 Aug 2017 20:54:52 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5413B28801; Sat, 5 Aug 2017 20:54:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DE8562871C for ; Sat, 5 Aug 2017 20:54:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752840AbdHEUyG (ORCPT ); Sat, 5 Aug 2017 16:54:06 -0400 Received: from mail-wm0-f42.google.com ([74.125.82.42]:35875 "EHLO mail-wm0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752864AbdHEUxx (ORCPT ); Sat, 5 Aug 2017 16:53:53 -0400 Received: by mail-wm0-f42.google.com with SMTP id t201so42451349wmt.1 for ; Sat, 05 Aug 2017 13:53:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=74NmevsJMIrPT9ZeoMsM1IJHz3SOXbrLKfcHj8sa8k0=; b=aSi3DI8VxF8vdyaFBxqnqB0IwrbLo51k9BA6262w6d3gH/6SbAyA2qzwxcdgzC8PsV OUSK3VyVTPRVEts32xsRJ8E5028DzvDgf+Yg5t2AvRhBqIG6Mi2OculohpwSxFN+If3Z PqnDgc8tR9ri0Bib4UNni1AXv9h4wwDtVMOAw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=74NmevsJMIrPT9ZeoMsM1IJHz3SOXbrLKfcHj8sa8k0=; b=lun21mhUjseprYlZwhwzVeohkbMwQEa8TfSH6lrVxvRulOFdCM/uTJmRd4se2Xp8SK zCqm7tddu7Cs9jqW7/6Z7h/FFPpIfPB7c+akcXRDvCi0PRgchhFesxzKRGqr9TErRBAf BlDi02slIVx9CRmKXO36+/mqsO68yOi5Qj10jRzMqnRXrU5+KF1OfcJFqeEwr+wc103n mI0uTPcP/HOSNkXX7m+qQHkz+4Gt+nD0+W2OOfT94oQQLEAXWKAEemgpqGWWz06nJie9 U8WueMG2k+kQGCLleOBLUquNJVUHnheixOCwTDP4KgLOTdxSvVsXCefdPK42pL0v0cRr JTcQ== X-Gm-Message-State: AHYfb5ggTjkWuzpDhJvcFunleTOzhQo92MgiIAN6Lnd9K3OjbufxxcHI N2qBqPQTyu1Ze5+e X-Received: by 10.28.100.136 with SMTP id y130mr4574673wmb.60.1501966431977; Sat, 05 Aug 2017 13:53:51 -0700 (PDT) Received: from localhost.localdomain ([160.77.147.147]) by smtp.gmail.com with ESMTPSA id v62sm2601775wmd.2.2017.08.05.13.53.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 05 Aug 2017 13:53:51 -0700 (PDT) From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux@armlinux.org.uk, linux-omap@vger.kernel.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, krzk@kernel.org, jason@lakedaemon.net, arm@kernel.org, andrew@lunn.ch, gregory.clement@free-electrons.com, sebastian.hesselbarth@gmail.com, tony@atomide.com, baohua@kernel.org, horms@verge.net.au, magnus.damm@gmail.com, vireshk@kernel.org, shiraz.linux.kernel@gmail.com, patrice.chotard@st.com, nico@linaro.org, dave.martin@arm.com, marc.zyngier@arm.com Cc: Ard Biesheuvel Subject: [PATCH 13/15] arm-soc: various: replace open coded VA->PA calculation of pen_release Date: Sat, 5 Aug 2017 21:52:20 +0100 Message-Id: <20170805205222.19868-14-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170805205222.19868-1-ard.biesheuvel@linaro.org> References: <20170805205222.19868-1-ard.biesheuvel@linaro.org> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This replaces a few copies of the open coded calculations of the physical address of 'pen_release' in the secondary startup code of a couple of platforms. Signed-off-by: Ard Biesheuvel --- arch/arm/mach-prima2/headsmp.S | 11 +++-------- arch/arm/mach-spear/headsmp.S | 11 +++-------- arch/arm/mach-sti/headsmp.S | 10 +++------- arch/arm/plat-versatile/headsmp.S | 9 +-------- 4 files changed, 10 insertions(+), 31 deletions(-) diff --git a/arch/arm/mach-prima2/headsmp.S b/arch/arm/mach-prima2/headsmp.S index 209d9fc5c16c..070df700bb38 100644 --- a/arch/arm/mach-prima2/headsmp.S +++ b/arch/arm/mach-prima2/headsmp.S @@ -9,6 +9,8 @@ #include #include +#include + /* * SIRFSOC specific entry point for secondary CPUs. This provides * a "holding pen" into which all secondary cores are held until we're @@ -17,10 +19,7 @@ ENTRY(sirfsoc_secondary_startup) mrc p15, 0, r0, c0, c0, 5 and r0, r0, #15 - adr r4, 1f - ldmia r4, {r5, r6} - sub r4, r4, r5 - add r6, r6, r4 + adr_l r6, pen_release pen: ldr r7, [r6] cmp r7, r0 bne pen @@ -31,7 +30,3 @@ pen: ldr r7, [r6] */ b secondary_startup ENDPROC(sirfsoc_secondary_startup) - - .align -1: .long . - .long pen_release diff --git a/arch/arm/mach-spear/headsmp.S b/arch/arm/mach-spear/headsmp.S index c52192dc3d9f..4da01b103f33 100644 --- a/arch/arm/mach-spear/headsmp.S +++ b/arch/arm/mach-spear/headsmp.S @@ -13,6 +13,8 @@ #include #include +#include + __INIT /* @@ -23,10 +25,7 @@ ENTRY(spear13xx_secondary_startup) mrc p15, 0, r0, c0, c0, 5 and r0, r0, #15 - adr r4, 1f - ldmia r4, {r5, r6} - sub r4, r4, r5 - add r6, r6, r4 + adr_l r6, pen_release pen: ldr r7, [r6] cmp r7, r0 bne pen @@ -40,8 +39,4 @@ pen: ldr r7, [r6] * should now contain the SVC stack for this core */ b secondary_startup - - .align -1: .long . - .long pen_release ENDPROC(spear13xx_secondary_startup) diff --git a/arch/arm/mach-sti/headsmp.S b/arch/arm/mach-sti/headsmp.S index e0ad451700d5..cdf3442f397b 100644 --- a/arch/arm/mach-sti/headsmp.S +++ b/arch/arm/mach-sti/headsmp.S @@ -16,6 +16,8 @@ #include #include +#include + /* * ST specific entry point for secondary CPUs. This provides * a "holding pen" into which all secondary cores are held until we're @@ -24,10 +26,7 @@ ENTRY(sti_secondary_startup) mrc p15, 0, r0, c0, c0, 5 and r0, r0, #15 - adr r4, 1f - ldmia r4, {r5, r6} - sub r4, r4, r5 - add r6, r6, r4 + adr_l r6, pen_release pen: ldr r7, [r6] cmp r7, r0 bne pen @@ -38,6 +37,3 @@ pen: ldr r7, [r6] */ b secondary_startup ENDPROC(sti_secondary_startup) - -1: .long . - .long pen_release diff --git a/arch/arm/plat-versatile/headsmp.S b/arch/arm/plat-versatile/headsmp.S index 40f27e52de75..0f2a5eddac5a 100644 --- a/arch/arm/plat-versatile/headsmp.S +++ b/arch/arm/plat-versatile/headsmp.S @@ -21,10 +21,7 @@ ENTRY(versatile_secondary_startup) ARM_BE8(setend be) mrc p15, 0, r0, c0, c0, 5 bic r0, #0xff000000 - adr r4, 1f - ldmia r4, {r5, r6} - sub r4, r4, r5 - add r6, r6, r4 + adr_l r6, pen_release pen: ldr r7, [r6] cmp r7, r0 bne pen @@ -34,8 +31,4 @@ pen: ldr r7, [r6] * should now contain the SVC stack for this core */ b secondary_startup - - .align -1: .long . - .long pen_release ENDPROC(versatile_secondary_startup)