From patchwork Sun Dec 17 03:22:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Soramichi AKIYAMA X-Patchwork-Id: 10117635 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4070B60392 for ; Sun, 17 Dec 2017 04:01:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 29DDA2932D for ; Sun, 17 Dec 2017 04:01:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1D62E29372; Sun, 17 Dec 2017 04:01:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 341852932D for ; Sun, 17 Dec 2017 04:01:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757263AbdLQEBo (ORCPT ); Sat, 16 Dec 2017 23:01:44 -0500 Received: from www2800.sakura.ne.jp ([49.212.180.240]:39417 "EHLO www2800.sakura.ne.jp" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757098AbdLQEBm (ORCPT ); Sat, 16 Dec 2017 23:01:42 -0500 X-Greylist: delayed 2334 seconds by postgrey-1.27 at vger.kernel.org; Sat, 16 Dec 2017 23:01:42 EST Received: from zipangu (i220-99-133-188.s42.a013.ap.plala.or.jp [220.99.133.188]) (authenticated bits=0) by www2800.sakura.ne.jp (8.14.5/8.14.5) with ESMTP id vBH3MUh0049947; Sun, 17 Dec 2017 12:22:30 +0900 (JST) (envelope-from akiyama@m.soramichi.jp) Date: Sun, 17 Dec 2017 12:22:30 +0900 From: Soramichi AKIYAMA To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, pbonzini@redhat.com, rkrcmar@redhat.com Subject: [PATCH] KVM: x86: Assign separate names for Intel and AMD to LBR MSRs Message-Id: <20171217122230.b0309c5d5fac320d9a523b54@m.soramichi.jp> X-Mailer: Sylpheed 3.6.0 (GTK+ 2.24.31; x86_64-pc-linux-gnu) Mime-Version: 1.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some of the MSRs related to LBR (Last Branch Record) have different names and layouts among Intel and AMD, but the kernel does not distinguish them. Currently it does not invoke any bugs, but it is better to assign them separate macros in order to avoid confusion. Signed-off-by: Soramichi Akiyama --- arch/x86/include/asm/msr-index.h | 19 +++++++++++++++---- arch/x86/kvm/x86.c | 8 ++++---- 2 files changed, 19 insertions(+), 8 deletions(-) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 34c4922bbc3f..a1c69de453d1 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -123,10 +123,21 @@ #define MSR_IA32_CR_PAT 0x00000277 #define MSR_IA32_DEBUGCTLMSR 0x000001d9 -#define MSR_IA32_LASTBRANCHFROMIP 0x000001db -#define MSR_IA32_LASTBRANCHTOIP 0x000001dc -#define MSR_IA32_LASTINTFROMIP 0x000001dd -#define MSR_IA32_LASTINTTOIP 0x000001de +/* + * 0x1db - 0x1de have different names and layouts between Intel and AMD + * so it is better to define dedicated macros for each of them. + * An Intel one (e.g. MSR_IA32_LASTBRANCH0) contains both "from" and "to" + * addresses (because they are used only in old 32 bit CPUs), while an AMD + * one (e.g. MSR_IA32_LASTBRANCHFROMIP) contains only one 64 bits address. + */ +#define MSR_IA32_LASTBRANCH0 0x000001db /* Intel */ +#define MSR_IA32_LASTBRANCH1 0x000001dc /* Intel */ +#define MSR_IA32_LASTBRANCH2 0x000001dd /* Intel */ +#define MSR_IA32_LASTBRANCH3 0x000001de /* Intel */ +#define MSR_IA32_LASTBRANCHFROMIP 0x000001db /* AMD */ +#define MSR_IA32_LASTBRANCHTOIP 0x000001dc /* AMD */ +#define MSR_IA32_LASTINTFROMIP 0x000001dd /* AMD */ +#define MSR_IA32_LASTINTTOIP 0x000001de /* AMD */ /* DEBUGCTLMSR bits (others vary by model): */ #define DEBUGCTLMSR_LBR (1UL << 0) /* last branch recording */ diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 56d036b9ad75..cef109f112f5 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2434,10 +2434,10 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) case MSR_IA32_PLATFORM_ID: case MSR_IA32_EBL_CR_POWERON: case MSR_IA32_DEBUGCTLMSR: - case MSR_IA32_LASTBRANCHFROMIP: - case MSR_IA32_LASTBRANCHTOIP: - case MSR_IA32_LASTINTFROMIP: - case MSR_IA32_LASTINTTOIP: + case MSR_IA32_LASTBRANCH0: + case MSR_IA32_LASTBRANCH1: + case MSR_IA32_LASTBRANCH2: + case MSR_IA32_LASTBRANCH3: case MSR_K8_SYSCFG: case MSR_K8_TSEG_ADDR: case MSR_K8_TSEG_MASK: