From patchwork Tue Jul 17 10:36:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 10528927 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D6A63600D0 for ; Tue, 17 Jul 2018 10:36:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C6CB8285F1 for ; Tue, 17 Jul 2018 10:36:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B7BD12860C; Tue, 17 Jul 2018 10:36:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5E850285F1 for ; Tue, 17 Jul 2018 10:36:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730008AbeGQLIw (ORCPT ); Tue, 17 Jul 2018 07:08:52 -0400 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:47338 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1729983AbeGQLIw (ORCPT ); Tue, 17 Jul 2018 07:08:52 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 4473A8151D46 for ; Tue, 17 Jul 2018 10:36:53 +0000 (UTC) Received: from kamzik.brq.redhat.com (unknown [10.43.2.160]) by smtp.corp.redhat.com (Postfix) with ESMTP id 787677C54; Tue, 17 Jul 2018 10:36:52 +0000 (UTC) From: Andrew Jones To: kvm@vger.kernel.org Cc: pbonzini@redhat.com, rkrcmar@redhat.com Subject: [PATCH kvm-unit-tests] arm/arm64: fix pci-test Date: Tue, 17 Jul 2018 12:36:51 +0200 Message-Id: <20180717103651.10425-1-drjones@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.11.54.5 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); Tue, 17 Jul 2018 10:36:53 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); Tue, 17 Jul 2018 10:36:53 +0000 (UTC) for IP:'10.11.54.5' DOMAIN:'int-mx05.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'drjones@redhat.com' RCPT:'' Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The latest machine type for mach-virt now uses a highmem address range for ecam space. For arm64 fixup our memory mapping in order to allow pci-test to access it. For arm, just use the highmem=off machine property to keep the ecam space in lowmem. Signed-off-by: Andrew Jones --- arm/run | 4 ++++ lib/arm/asm/setup.h | 3 --- lib/arm/mmu.c | 18 ++++++++++++++++-- 3 files changed, 20 insertions(+), 5 deletions(-) diff --git a/arm/run b/arm/run index fd280ee19837..277db9bb4a02 100755 --- a/arm/run +++ b/arm/run @@ -35,6 +35,10 @@ if [ "$ACCEL" = "kvm" ]; then fi fi +if [ "$ARCH" = "arm" ]; then + M+=",highmem=off" +fi + if ! $qemu $M -device '?' 2>&1 | grep virtconsole > /dev/null; then echo "$qemu doesn't support virtio-console for chr-testdev. Exiting." exit 2 diff --git a/lib/arm/asm/setup.h b/lib/arm/asm/setup.h index fe9b15f70cd4..b57ea13b9dd2 100644 --- a/lib/arm/asm/setup.h +++ b/lib/arm/asm/setup.h @@ -25,9 +25,6 @@ extern phys_addr_t __phys_offset, __phys_end; #define PHYS_OFFSET (__phys_offset) #define PHYS_END (__phys_end) -/* mach-virt reserves the first 1G section for I/O */ -#define PHYS_IO_OFFSET (0UL) -#define PHYS_IO_END (1UL << 30) #define L1_CACHE_SHIFT 6 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) diff --git a/lib/arm/mmu.c b/lib/arm/mmu.c index 548ec88277bc..03f6622680e3 100644 --- a/lib/arm/mmu.c +++ b/lib/arm/mmu.c @@ -168,9 +168,23 @@ void *setup_mmu(phys_addr_t phys_end) mmu_idmap = alloc_page(); memset(mmu_idmap, 0, PAGE_SIZE); - mmu_set_range_sect(mmu_idmap, PHYS_IO_OFFSET, - PHYS_IO_OFFSET, PHYS_IO_END, + /* + * mach-virt I/O regions: + * - The first 1G (arm/arm64) + * - 512M at 256G (arm64, arm uses highmem=off) + * - 512G at 512G (arm64, arm uses highmem=off) + */ + mmu_set_range_sect(mmu_idmap, + 0, 0, (1ul << 30), + __pgprot(PMD_SECT_UNCACHED | PMD_SECT_USER)); +#ifdef __aarch64__ + mmu_set_range_sect(mmu_idmap, + (1ul << 38), (1ul << 38), (1ul << 38) | (1ul << 29), + __pgprot(PMD_SECT_UNCACHED | PMD_SECT_USER)); + mmu_set_range_sect(mmu_idmap, + (1ul << 39), (1ul << 39), (1ul << 40), __pgprot(PMD_SECT_UNCACHED | PMD_SECT_USER)); +#endif /* armv8 requires code shared between EL1 and EL0 to be read-only */ mmu_set_range_ptes(mmu_idmap, PHYS_OFFSET,