Message ID | 20180813145755.16566-3-marc.zyngier@arm.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
Return-Path: <kvm-owner@kernel.org> Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8324C14E2 for <patchwork-kvm@patchwork.kernel.org>; Mon, 13 Aug 2018 14:58:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 73B7329425 for <patchwork-kvm@patchwork.kernel.org>; Mon, 13 Aug 2018 14:58:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 681B929432; Mon, 13 Aug 2018 14:58:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0FA4329425 for <patchwork-kvm@patchwork.kernel.org>; Mon, 13 Aug 2018 14:58:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729241AbeHMRld (ORCPT <rfc822;patchwork-kvm@patchwork.kernel.org>); Mon, 13 Aug 2018 13:41:33 -0400 Received: from foss.arm.com ([217.140.101.70]:59792 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729215AbeHMRlc (ORCPT <rfc822;kvm@vger.kernel.org>); Mon, 13 Aug 2018 13:41:32 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 309E01596; Mon, 13 Aug 2018 07:58:56 -0700 (PDT) Received: from approximate.Emea.Arm.com (approximate.Emea.Arm.com [10.4.13.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 36AE03F5D0; Mon, 13 Aug 2018 07:58:53 -0700 (PDT) From: Marc Zyngier <marc.zyngier@arm.com> To: Paolo Bonzini <pbonzini@redhat.com>, =?utf-8?b?UmFkaW0gS3LEjW3DocWZ?= <rkrcmar@redhat.com> Cc: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, Andre Przywara <andre.przywara@arm.com>, Andrew Jones <drjones@redhat.com>, Catalin Marinas <catalin.marinas@arm.com>, Christoffer Dall <christoffer.dall@arm.com>, Dongjiu Geng <gengdongjiu@huawei.com>, Eric Auger <eric.auger@redhat.com>, "Gustavo A . R . Silva" <gustavo@embeddedor.com>, James Morse <james.morse@arm.com>, Jia He <jia.he@hxt-semitech.com>, Kees Cook <keescook@chromium.org>, Mark Rutland <mark.rutland@arm.com>, Punit Agrawal <punit.agrawal@arm.com>, Suzuki Poulose <suzuki.poulose@arm.com> Subject: [PATCH 02/37] arm64: KVM: Handle Set/Way CMOs as NOPs if FWB is present Date: Mon, 13 Aug 2018 15:57:20 +0100 Message-Id: <20180813145755.16566-3-marc.zyngier@arm.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180813145755.16566-1-marc.zyngier@arm.com> References: <20180813145755.16566-1-marc.zyngier@arm.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: <kvm.vger.kernel.org> X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP |
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[01/37] arm64: KVM: Add support for Stage-2 control of memory types and cacheability
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diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index a4363735d3f8..774d72155904 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -194,7 +194,16 @@ static bool access_dcsw(struct kvm_vcpu *vcpu, if (!p->is_write) return read_from_write_only(vcpu, p, r); - kvm_set_way_flush(vcpu); + /* + * Only track S/W ops if we don't have FWB. It still indicates + * that the guest is a bit broken (S/W operations should only + * be done by firmware, knowing that there is only a single + * CPU left in the system, and certainly not from non-secure + * software). + */ + if (!cpus_have_const_cap(ARM64_HAS_STAGE2_FWB)) + kvm_set_way_flush(vcpu); + return true; }