diff mbox series

[35/37] KVM: arm: Use true and false for boolean values

Message ID	20180813145755.16566-36-marc.zyngier@arm.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <kvm-owner@kernel.org> From: Marc Zyngier <marc.zyngier@arm.com> To: Paolo Bonzini <pbonzini@redhat.com>, =?utf-8?b?UmFkaW0gS3LEjW3DocWZ?= <rkrcmar@redhat.com> Cc: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, Andre Przywara <andre.przywara@arm.com>, Andrew Jones <drjones@redhat.com>, Catalin Marinas <catalin.marinas@arm.com>, Christoffer Dall <christoffer.dall@arm.com>, Dongjiu Geng <gengdongjiu@huawei.com>, Eric Auger <eric.auger@redhat.com>, "Gustavo A . R . Silva" <gustavo@embeddedor.com>, James Morse <james.morse@arm.com>, Jia He <jia.he@hxt-semitech.com>, Kees Cook <keescook@chromium.org>, Mark Rutland <mark.rutland@arm.com>, Punit Agrawal <punit.agrawal@arm.com>, Suzuki Poulose <suzuki.poulose@arm.com> Subject: [PATCH 35/37] KVM: arm: Use true and false for boolean values Date: Mon, 13 Aug 2018 15:57:53 +0100 Message-Id: <20180813145755.16566-36-marc.zyngier@arm.com> In-Reply-To: <20180813145755.16566-1-marc.zyngier@arm.com> References: <20180813145755.16566-1-marc.zyngier@arm.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk
Series	[01/37] arm64: KVM: Add support for Stage-2 control of memory types and cacheability \| expand [01/37] arm64: KVM: Add support for Stage-2 control of memory types and cacheability [02/37] arm64: KVM: Handle Set/Way CMOs as NOPs if FWB is present [03/37] arm64: KVM: Avoid marking pages as XN in Stage-2 if CTR_EL0.DIC is set [04/37] KVM: arm/arm64: Consolidate page-table accessors [05/37] KVM: arm/arm64: Stop using the kernel's {pmd,pud,pgd}_populate helpers [06/37] KVM: arm/arm64: Remove unnecessary CMOs when creating HYP page tables [07/37] KVM: arm/arm64: Enable adaptative WFE trapping [08/37] KVM: arm/arm64: Fix vgic init race [09/37] KVM: arm64: vgic-its: Remove VLA usage [10/37] KVM: arm/arm64: vgic-debug: Show LPI status [11/37] arm64: KVM: Cleanup tpidr_el2 init on non-VHE [12/37] KVM: arm/arm64: vgic: Define GICD_IIDR fields for GICv2 and GIv3 [13/37] KVM: arm/arm64: vgic: Keep track of implementation revision [14/37] KVM: arm/arm64: vgic: GICv2 IGROUPR should read as zero [15/37] KVM: arm/arm64: vgic: Add group field to struct irq [16/37] KVM: arm/arm64: vgic: Signal IRQs using their configured group [17/37] KVM: arm/arm64: vgic: Permit uaccess writes to return errors [18/37] KVM: arm/arm64: vgic: Return error on incompatible uaccess GICD_IIDR writes [19/37] KVM: arm/arm64: vgic: Allow configuration of interrupt groups [20/37] KVM: arm/arm64: vgic: Let userspace opt-in to writable v2 IGROUPR [21/37] KVM: arm/arm64: vgic: Update documentation of the GIC devices wrt IIDR [22/37] arm/arm64: KVM: Add KVM_GET/SET_VCPU_EVENTS [23/37] arm64: KVM: export the capability to set guest SError syndrome [24/37] KVM: arm64: Share the parts of get/set events useful to 32bit [25/37] KVM: arm: Add 32bit get/set events support [26/37] KVM: arm/arm64: vgic: Fix possible spectre-v1 write in vgic_mmio_write_apr() [27/37] KVM: arm/arm64: Fix potential loss of ptimer interrupts [28/37] KVM: arm/arm64: Fix lost IRQs from emulated physcial timer when blocked [29/37] KVM: arm64: Remove non-existent AArch32 ICC_SGI1R encoding [30/37] KVM: arm/arm64: vgic-v3: Add core support for Group0 SGIs [31/37] KVM: arm64: vgic-v3: Add support for ICC_SGI0R_EL1 and ICC_ASGI1R_EL1 accesses [32/37] KVM: arm: vgic-v3: Add support for ICC_SGI0R and ICC_ASGI1R accesses [33/37] KVM: arm/arm64: vgic: Move DEBUG_SPINLOCK_BUG_ON to vgic.h [34/37] KVM: arm/arm64: vgic: Do not use spin_lock_irqsave/restore with irq disabled [35/37] KVM: arm: Use true and false for boolean values [36/37] KVM: arm/arm64: Skip updating PMD entry if no change [37/37] KVM: arm/arm64: Skip updating PTE entry if no change

Commit Message

Marc Zyngier Aug. 13, 2018, 2:57 p.m. UTC

From: "Gustavo A. R. Silva" <gustavo@embeddedor.com>

Return statements in functions returning bool should use true or false
instead of an integer value.

This code was detected with the help of Coccinelle.

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
 arch/arm/include/asm/kvm_emulate.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff mbox series

Patch

diff --git a/arch/arm/include/asm/kvm_emulate.h b/arch/arm/include/asm/kvm_emulate.h
index b50fe8380868..2b7eed21b20e 100644
--- a/arch/arm/include/asm/kvm_emulate.h
+++ b/arch/arm/include/asm/kvm_emulate.h
@@ -119,7 +119,7 @@  static inline void vcpu_set_wfe_traps(struct kvm_vcpu *vcpu)
 
 static inline bool vcpu_mode_is_32bit(const struct kvm_vcpu *vcpu)
 {
-	return 1;
+	return true;
 }
 
 static inline unsigned long *vcpu_pc(struct kvm_vcpu *vcpu)