From patchwork Fri Aug 24 00:03:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Krish Sadhukhan X-Patchwork-Id: 10574695 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 29FA55A4 for ; Fri, 24 Aug 2018 00:26:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1A9B62C80B for ; Fri, 24 Aug 2018 00:26:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0EC642C812; Fri, 24 Aug 2018 00:26:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7168B2C80D for ; Fri, 24 Aug 2018 00:26:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726364AbeHXD6Y (ORCPT ); Thu, 23 Aug 2018 23:58:24 -0400 Received: from userp2120.oracle.com ([156.151.31.85]:54758 "EHLO userp2120.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726156AbeHXD6X (ORCPT ); Thu, 23 Aug 2018 23:58:23 -0400 Received: from pps.filterd (userp2120.oracle.com [127.0.0.1]) by userp2120.oracle.com (8.16.0.22/8.16.0.22) with SMTP id w7O0KVB1076133; Fri, 24 Aug 2018 00:26:12 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type : content-transfer-encoding; s=corp-2018-07-02; bh=cmPzVp3bZb2Jo2h37FKLdOXRlW20BWu9Zmdkl3u2E3U=; b=5h+AT1bvi17LrA8JQ3Qkk2VYyyC2sxIUEBgywuna29MRRFy/2LwoYFCl4dEfFsUb2PaP MbIhRr/1WiGtcZSnfMGn6SObtVIpkPc4lULhEyTeNIilQ4c2WMWdA/71Eltx+MJYXutv bdfPNzXcC8IQT2B8pWd1rX94oQNzzIw0fe30N+mMojPoOeh7b41URy4qw/VrW6H4MyNy mFAnrskWguqhnBnauS/Gr9yvOOe4a0C8oO4g5Lrj0xhUbLfHwzlPPPmE6xEN8IdDeyNo B+5BHJObWRUSqzg/NDr6GGjdYbvAm+YI5QvbHm2inOyFGJG4v74+To5SXrmSdl3ywW0n lA== Received: from userv0021.oracle.com (userv0021.oracle.com [156.151.31.71]) by userp2120.oracle.com with ESMTP id 2kxc3r48yv-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 24 Aug 2018 00:26:12 +0000 Received: from userv0121.oracle.com (userv0121.oracle.com [156.151.31.72]) by userv0021.oracle.com (8.14.4/8.14.4) with ESMTP id w7O0QCbA000388 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 24 Aug 2018 00:26:12 GMT Received: from abhmp0005.oracle.com (abhmp0005.oracle.com [141.146.116.11]) by userv0121.oracle.com (8.14.4/8.13.8) with ESMTP id w7O0QBhC017272; Fri, 24 Aug 2018 00:26:12 GMT Received: from ban25x6uut29.us.oracle.com (/10.153.73.29) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Thu, 23 Aug 2018 17:26:11 -0700 From: Krish Sadhukhan To: kvm@vger.kernel.org Cc: pbonzini@redhat.com, rkrcmar@redhat.com, jmattson@google.com Subject: [PATCH 2/2] [kvm-unit-test] nVMX x86: check posted-interrupt control on vmentry of L2 Date: Thu, 23 Aug 2018 20:03:04 -0400 Message-Id: <20180824000304.19070-3-krish.sadhukhan@oracle.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20180824000304.19070-1-krish.sadhukhan@oracle.com> References: <20180824000304.19070-1-krish.sadhukhan@oracle.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=8994 signatures=668707 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=1 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=717 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1808240002 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP According to section "Checks on VMX Controls" in Intel SDM vol 3C, the following check needs to be enforced on vmentry of L2 guests: If the “process posted interrupts” VM-execution control is 1, the following must be true: - The “virtual-interrupt delivery” VM-execution control is 1. - The “acknowledge interrupt on exit” VM-exit control is 1. - The posted-interrupt notification vector has a value in the - range 0–255 (bits 15:8 are all 0). - Bits 5:0 of the posted-interrupt descriptor address are all 0. - The posted-interrupt descriptor address does not set any bits beyond the processor's physical-address width. Signed-off-by: Krish Sadhukhan Reviewed-by: Darren Kenny Reviewed-by: Karl Heubaum --- x86/vmx.h | 1 + x86/vmx_tests.c | 128 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 129 insertions(+) diff --git a/x86/vmx.h b/x86/vmx.h index 54646f5..22b2892 100644 --- a/x86/vmx.h +++ b/x86/vmx.h @@ -144,6 +144,7 @@ enum Encoding { TSC_OFFSET_HI = 0x2011ul, APIC_VIRT_ADDR = 0x2012ul, APIC_ACCS_ADDR = 0x2014ul, + POSTED_INTR_DESC_ADDR = 0x2016ul, EPTP = 0x201aul, EPTP_HI = 0x201bul, VMREAD_BITMAP = 0x2026ul, diff --git a/x86/vmx_tests.c b/x86/vmx_tests.c index caa1834..8b2efd8 100644 --- a/x86/vmx_tests.c +++ b/x86/vmx_tests.c @@ -3912,12 +3912,140 @@ static void test_virtual_intr_ctls(void) vmcs_write(PIN_CONTROLS, pin_saved); } +static void test_pi_desc_addr(u64 addr, bool ctrl) +{ + vmcs_write(POSTED_INTR_DESC_ADDR, addr); + report_prefix_pushf("Process-posted-interrupts enabled; posted-interrupt-descriptor-address 0x%lx", addr); + test_vmx_controls(ctrl, false); + report_prefix_pop(); +} + +/* + * If the “process posted interrupts” VM-execution control is 1, the + * following must be true: + * + * - The “virtual-interrupt delivery” VM-execution control is 1. + * - The “acknowledge interrupt on exit” VM-exit control is 1. + * - The posted-interrupt notification vector has a value in the + * - range 0–255 (bits 15:8 are all 0). + * - Bits 5:0 of the posted-interrupt descriptor address are all 0. + * - The posted-interrupt descriptor address does not set any bits + * beyond the processor's physical-address width. + * [Intel SDM] + */ +static void test_posted_intr(void) +{ + u32 saved_primary = vmcs_read(CPU_EXEC_CTRL0); + u32 saved_secondary = vmcs_read(CPU_EXEC_CTRL1); + u32 saved_pin = vmcs_read(PIN_CONTROLS); + u32 exit_ctl_saved = vmcs_read(EXI_CONTROLS); + u32 primary = saved_primary; + u32 secondary = saved_secondary; + u32 pin = saved_pin; + u32 exit_ctl = exit_ctl_saved; + u16 vec; + int i; + + if (!((ctrl_pin_rev.clr & PIN_POST_INTR) && + (ctrl_cpu_rev[1].clr & CPU_VINTD) && + (ctrl_exit_rev.clr & EXI_INTA))) + return; + + vmcs_write(CPU_EXEC_CTRL0, primary | CPU_SECONDARY | CPU_TPR_SHADOW); + + /* + * Test virtual-interrupt-delivery and acknowledge-interrupt-on-exit + */ + pin |= PIN_POST_INTR; + vmcs_write(PIN_CONTROLS, pin); + secondary &= ~CPU_VINTD; + vmcs_write(CPU_EXEC_CTRL1, secondary); + report_prefix_pushf("Process-posted-interrupts enabled; virtual-interrupt-delivery disabled"); + test_vmx_controls(false, false); + report_prefix_pop(); + + secondary |= CPU_VINTD; + vmcs_write(CPU_EXEC_CTRL1, secondary); + report_prefix_pushf("Process-posted-interrupts enabled; virtual-interrupt-delivery enabled"); + test_vmx_controls(false, false); + report_prefix_pop(); + + exit_ctl &= ~EXI_INTA; + vmcs_write(EXI_CONTROLS, exit_ctl); + report_prefix_pushf("Process-posted-interrupts enabled; virtual-interrupt-delivery enabled; acknowledge-interrupt-on-exit disabled"); + test_vmx_controls(false, false); + report_prefix_pop(); + + exit_ctl |= EXI_INTA; + vmcs_write(EXI_CONTROLS, exit_ctl); + report_prefix_pushf("Process-posted-interrupts enabled; virtual-interrupt-delivery enabled; acknowledge-interrupt-on-exit enabled"); + test_vmx_controls(true, false); + report_prefix_pop(); + + secondary &= ~CPU_VINTD; + vmcs_write(CPU_EXEC_CTRL1, secondary); + report_prefix_pushf("Process-posted-interrupts enabled; virtual-interrupt-delivery disabled; acknowledge-interrupt-on-exit enabled"); + test_vmx_controls(false, false); + report_prefix_pop(); + + secondary |= CPU_VINTD; + vmcs_write(CPU_EXEC_CTRL1, secondary); + report_prefix_pushf("Process-posted-interrupts enabled; virtual-interrupt-delivery enabled; acknowledge-interrupt-on-exit enabled"); + test_vmx_controls(true, false); + report_prefix_pop(); + + /* + * Test posted-interrupt notification vector + */ + for (i = 0; i < 8; i++) { + vec = (1ul << i); + vmcs_write(PINV, vec); + report_prefix_pushf("Process-posted-interrupts enabled; posted-interrupt-notification-vector %u", vec); + test_vmx_controls(true, false); + report_prefix_pop(); + } + for (i = 8; i < 16; i++) { + vec = (1ul << i); + vmcs_write(PINV, vec); + report_prefix_pushf("Process-posted-interrupts enabled; posted-interrupt-notification-vector %u", vec); + test_vmx_controls(false, false); + report_prefix_pop(); + } + + vec &= ~(0xff << 8); + vmcs_write(PINV, vec); + report_prefix_pushf("Process-posted-interrupts enabled; posted-interrupt-notification-vector %u", vec); + test_vmx_controls(true, false); + report_prefix_pop(); + + /* + * Test posted-interrupt descriptor addresss + */ + for (i = 0; i < 6; i++) { + test_pi_desc_addr(1ul << i, false); + } + + test_pi_desc_addr(0xf0, false); + test_pi_desc_addr(0xff, false); + test_pi_desc_addr(0x0f, false); + test_pi_desc_addr(0x8000, true); + test_pi_desc_addr(0x00, true); + test_pi_desc_addr(0xc000, true); + + test_vmcs_page_values("process-posted interrupts", POSTED_INTR_DESC_ADDR, false, false); + + vmcs_write(CPU_EXEC_CTRL0, saved_primary); + vmcs_write(CPU_EXEC_CTRL1, saved_secondary); + vmcs_write(PIN_CONTROLS, saved_pin); +} + static void test_apic_ctls(void) { test_apic_virt_addr(); test_apic_access_addr(); test_apic_virtual_ctls(); test_virtual_intr_ctls(); + test_posted_intr(); } static void set_vtpr(unsigned vtpr)