Message ID | 20181015204553.18699-1-william.tambe@amd.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [kvm-unit-tests] x86: svm: Fix incorrect ordering within struct regs | expand |
Gentle ping. We want to upstream a patch testing all MSRs interceptable by SVM. Without this fix, the values of registers RCX & RDX used by the instructions RDMSR & WRMSR cannot be inspected after #VMEXIT using "struct regs". Regards, William > -----Original Message----- > From: kvm-owner@vger.kernel.org <kvm-owner@vger.kernel.org> On Behalf Of Tambe, William > Sent: Monday, October 15, 2018 3:46 PM > To: kvm@vger.kernel.org > Subject: [kvm-unit-tests PATCH] x86: svm: Fix incorrect ordering within struct regs > > "struct regs" is used within x86/svm.c to describe > the memory region where SAVE_GPR_C saves registers. > > The ordering within "struct regs" must be corrected > so that it matches how SAVE_GPR_C stores registers. > > Signed-off-by: William Tambe <william.tambe@amd.com> > --- > x86/svm.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/x86/svm.c b/x86/svm.c > index 701ab2f..bc0396d 100644 > --- a/x86/svm.c > +++ b/x86/svm.c > @@ -199,9 +199,9 @@ static void test_thunk(struct test *test) > > struct regs { > u64 rax; > + u64 rbx; > u64 rcx; > u64 rdx; > - u64 rbx; > u64 cr2; > u64 rbp; > u64 rsi; > -- > 2.17.1
On 22/10/2018 14:04, Tambe, William wrote: > Gentle ping. > > We want to upstream a patch testing all MSRs interceptable by SVM. > > Without this fix, the values of registers RCX & RDX used by the instructions RDMSR & WRMSR cannot be inspected after #VMEXIT using "struct regs". > > Regards, > William > >> -----Original Message----- >> From: kvm-owner@vger.kernel.org <kvm-owner@vger.kernel.org> On Behalf Of Tambe, William >> Sent: Monday, October 15, 2018 3:46 PM >> To: kvm@vger.kernel.org >> Subject: [kvm-unit-tests PATCH] x86: svm: Fix incorrect ordering within struct regs >> >> "struct regs" is used within x86/svm.c to describe >> the memory region where SAVE_GPR_C saves registers. Sorry, I missed this message. The patch is okay, I might not be able to commit it until next week though. Paolo
> -----Original Message----- > From: Paolo Bonzini <pbonzini@redhat.com> > Sent: Monday, October 22, 2018 10:14 AM > To: Tambe, William <William.Tambe@amd.com>; kvm@vger.kernel.org > Subject: Re: [kvm-unit-tests PATCH] x86: svm: Fix incorrect ordering within struct regs > > On 22/10/2018 14:04, Tambe, William wrote: > > Gentle ping. > > > > We want to upstream a patch testing all MSRs interceptable by SVM. > > > > Without this fix, the values of registers RCX & RDX used by the instructions RDMSR & WRMSR cannot be inspected > after #VMEXIT using "struct regs". > > > > Regards, > > William > > > >> -----Original Message----- > >> From: kvm-owner@vger.kernel.org <kvm-owner@vger.kernel.org> On Behalf Of Tambe, William > >> Sent: Monday, October 15, 2018 3:46 PM > >> To: kvm@vger.kernel.org > >> Subject: [kvm-unit-tests PATCH] x86: svm: Fix incorrect ordering within struct regs > >> > >> "struct regs" is used within x86/svm.c to describe > >> the memory region where SAVE_GPR_C saves registers. > > Sorry, I missed this message. The patch is okay, I might not be able to > commit it until next week though. Thank you; will wait. > > Paolo Regards, William
diff --git a/x86/svm.c b/x86/svm.c index 701ab2f..bc0396d 100644 --- a/x86/svm.c +++ b/x86/svm.c @@ -199,9 +199,9 @@ static void test_thunk(struct test *test) struct regs { u64 rax; + u64 rbx; u64 rcx; u64 rdx; - u64 rbx; u64 cr2; u64 rbp; u64 rsi;
"struct regs" is used within x86/svm.c to describe the memory region where SAVE_GPR_C saves registers. The ordering within "struct regs" must be corrected so that it matches how SAVE_GPR_C stores registers. Signed-off-by: William Tambe <william.tambe@amd.com> --- x86/svm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)