diff mbox series

[PULL,1/7] i386: correct cpu_x86_cpuid(0xd)

Message ID 20181031004550.15410-2-ehabkost@redhat.com (mailing list archive)
State New, archived
Headers show
Series [PULL,1/7] i386: correct cpu_x86_cpuid(0xd) | expand

Commit Message

Eduardo Habkost Oct. 31, 2018, 12:45 a.m. UTC 
From: Sebastian Andrzej Siewior <bigeasy@linutronix.de>

Intel SDM says for CPUID function 0DH, sub-function 0:

| • ECX enumerates the size (in bytes) required by the XSAVE instruction for an
|   XSAVE area containing all the user state components supported by this
|   processor.
| • EBX enumerates the size (in bytes) required by the XSAVE instruction for an
|   XSAVE area containing all the user state components corresponding to bits
|   currently set in XCR0.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Message-Id: <20180928104319.3296-1-bigeasy@linutronix.de>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
 target/i386/cpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 1469a1be01..fe7c963e5e 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -4178,7 +4178,7 @@  void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
             *ecx = xsave_area_size(x86_cpu_xsave_components(cpu));
             *eax = env->features[FEAT_XSAVE_COMP_LO];
             *edx = env->features[FEAT_XSAVE_COMP_HI];
-            *ebx = *ecx;
+            *ebx = xsave_area_size(env->xcr0);
         } else if (count == 1) {
             *eax = env->features[FEAT_XSAVE];
         } else if (count < ARRAY_SIZE(x86_ext_save_areas)) {