| Message ID | 20181226081532.30698-2-weijiang.yang@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | This patch-set is to enable kvm Guest OS CET support. | expand |
On Wed, Dec 26, 2018 at 04:15:25PM +0800, Yang Weijiang wrote: > VMX relies on these fields to save/restore CET states for > guest and host. They are added here as VMCS placeholders > for the function. The changelog needs a lot more detail on what is saved where and when, e.g. hardware unconditionally saves the guest MSRs to the VMCS fields on exit, hence there is no VM_EXIT_SAVE_GUEST_CET_STATE control bit. It's also worth calling out that the other CET MSRs are saved/loaded via XSAVES/XRSTORS. > > Signed-off-by: Zhang Yi Z <yi.z.zhang@linux.intel.com> > Signed-off-by: Yang Weijiang <weijiang.yang@intel.com> > --- > arch/x86/include/asm/vmx.h | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h > index ade0f153947d..db745a1d49ae 100644 > --- a/arch/x86/include/asm/vmx.h > +++ b/arch/x86/include/asm/vmx.h > @@ -98,6 +98,7 @@ > #define VM_EXIT_LOAD_IA32_EFER 0x00200000 > #define VM_EXIT_SAVE_VMX_PREEMPTION_TIMER 0x00400000 > #define VM_EXIT_CLEAR_BNDCFGS 0x00800000 > +#define VM_EXIT_LOAD_HOST_CET_STATE 0x10000000 > > #define VM_EXIT_ALWAYSON_WITHOUT_TRUE_MSR 0x00036dff > > @@ -109,6 +110,7 @@ > #define VM_ENTRY_LOAD_IA32_PAT 0x00004000 > #define VM_ENTRY_LOAD_IA32_EFER 0x00008000 > #define VM_ENTRY_LOAD_BNDCFGS 0x00010000 > +#define VM_ENTRY_LOAD_GUEST_CET_STATE 0x00100000 > > #define VM_ENTRY_ALWAYSON_WITHOUT_TRUE_MSR 0x000011ff > > @@ -325,6 +327,9 @@ enum vmcs_field { > GUEST_PENDING_DBG_EXCEPTIONS = 0x00006822, > GUEST_SYSENTER_ESP = 0x00006824, > GUEST_SYSENTER_EIP = 0x00006826, > + GUEST_IA32_S_CET = 0x00006828, > + GUEST_SSP = 0x0000682a, > + GUEST_INT_SSP_TABL = 0x0000682c, Dropping a single letter from "TABLE" seems pointless, "INTERRUPT" is usually "INTR", and the docs I've seen list the name as IA32_INTERRUPT_SSP_TABLE_ADDR. So maybe? {GUEST,HOST}_INTR_SSP_TABLE_ADDR Also, the SSP and INTERRUPT_SSP_TABL_ADDR fields are 64-bit fields, we we should define the _HIGH variations. > HOST_CR0 = 0x00006c00, > HOST_CR3 = 0x00006c02, > HOST_CR4 = 0x00006c04, > @@ -337,6 +342,9 @@ enum vmcs_field { > HOST_IA32_SYSENTER_EIP = 0x00006c12, > HOST_RSP = 0x00006c14, > HOST_RIP = 0x00006c16, > + HOST_IA32_S_CET = 0x00006c18, > + HOST_SSP = 0x00006c1a, > + HOST_INT_SSP_TABL = 0x00006c1c > }; > > /* > -- > 2.17.1 >
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h index ade0f153947d..db745a1d49ae 100644 --- a/arch/x86/include/asm/vmx.h +++ b/arch/x86/include/asm/vmx.h @@ -98,6 +98,7 @@ #define VM_EXIT_LOAD_IA32_EFER 0x00200000 #define VM_EXIT_SAVE_VMX_PREEMPTION_TIMER 0x00400000 #define VM_EXIT_CLEAR_BNDCFGS 0x00800000 +#define VM_EXIT_LOAD_HOST_CET_STATE 0x10000000 #define VM_EXIT_ALWAYSON_WITHOUT_TRUE_MSR 0x00036dff @@ -109,6 +110,7 @@ #define VM_ENTRY_LOAD_IA32_PAT 0x00004000 #define VM_ENTRY_LOAD_IA32_EFER 0x00008000 #define VM_ENTRY_LOAD_BNDCFGS 0x00010000 +#define VM_ENTRY_LOAD_GUEST_CET_STATE 0x00100000 #define VM_ENTRY_ALWAYSON_WITHOUT_TRUE_MSR 0x000011ff @@ -325,6 +327,9 @@ enum vmcs_field { GUEST_PENDING_DBG_EXCEPTIONS = 0x00006822, GUEST_SYSENTER_ESP = 0x00006824, GUEST_SYSENTER_EIP = 0x00006826, + GUEST_IA32_S_CET = 0x00006828, + GUEST_SSP = 0x0000682a, + GUEST_INT_SSP_TABL = 0x0000682c, HOST_CR0 = 0x00006c00, HOST_CR3 = 0x00006c02, HOST_CR4 = 0x00006c04, @@ -337,6 +342,9 @@ enum vmcs_field { HOST_IA32_SYSENTER_EIP = 0x00006c12, HOST_RSP = 0x00006c14, HOST_RIP = 0x00006c16, + HOST_IA32_S_CET = 0x00006c18, + HOST_SSP = 0x00006c1a, + HOST_INT_SSP_TABL = 0x00006c1c }; /*