@@ -23,6 +23,7 @@
* same offset regardless of where the code is executing
*/
extern void __iomem *xive_tima;
+extern unsigned long xive_tima_os;
/*
* Offset in the TM area of our current execution level (provided by
@@ -678,5 +678,6 @@ struct kvm_ppc_cpu_char {
/* POWER9 XIVE Native Interrupt Controller */
#define KVM_DEV_XIVE_GRP_CTRL 1
#define KVM_DEV_XIVE_GET_ESB_FD 1
+#define KVM_DEV_XIVE_GET_TIMA_FD 2
#endif /* __LINUX_KVM_POWERPC_H */
@@ -232,6 +232,60 @@ static int kvmppc_xive_native_get_esb_fd(struct kvmppc_xive *xive, u64 addr)
return put_user(ret, ubufp);
}
+static int xive_native_tima_fault(struct vm_fault *vmf)
+{
+ struct vm_area_struct *vma = vmf->vma;
+
+ switch (vmf->pgoff) {
+ case 0: /* HW - forbid access */
+ case 1: /* HV - forbid access */
+ return VM_FAULT_SIGBUS;
+ case 2: /* OS */
+ vmf_insert_pfn(vma, vmf->address, xive_tima_os >> PAGE_SHIFT);
+ return VM_FAULT_NOPAGE;
+ case 3: /* USER - TODO */
+ default:
+ return VM_FAULT_SIGBUS;
+ }
+}
+
+static const struct vm_operations_struct xive_native_tima_vmops = {
+ .fault = xive_native_tima_fault,
+};
+
+static int xive_native_tima_mmap(struct file *file, struct vm_area_struct *vma)
+{
+ /*
+ * The TIMA is four pages wide but only the last two pages (OS
+ * and User view) are accessible to the guest. The page fault
+ * handler will handle the permissions.
+ */
+ if (vma_pages(vma) + vma->vm_pgoff > 4)
+ return -EINVAL;
+
+ vma->vm_flags |= VM_IO | VM_PFNMAP;
+ vma->vm_page_prot = pgprot_noncached_wc(vma->vm_page_prot);
+ vma->vm_ops = &xive_native_tima_vmops;
+ return 0;
+}
+
+static const struct file_operations xive_native_tima_fops = {
+ .mmap = xive_native_tima_mmap,
+};
+
+static int kvmppc_xive_native_get_tima_fd(struct kvmppc_xive *xive, u64 addr)
+{
+ u64 __user *ubufp = (u64 __user *) addr;
+ int ret;
+
+ ret = anon_inode_getfd("[xive-tima]", &xive_native_tima_fops, xive,
+ O_RDWR | O_CLOEXEC);
+ if (ret < 0)
+ return ret;
+
+ return put_user(ret, ubufp);
+}
+
static int kvmppc_xive_native_set_attr(struct kvm_device *dev,
struct kvm_device_attr *attr)
{
@@ -248,6 +302,8 @@ static int kvmppc_xive_native_get_attr(struct kvm_device *dev,
switch (attr->attr) {
case KVM_DEV_XIVE_GET_ESB_FD:
return kvmppc_xive_native_get_esb_fd(xive, attr->addr);
+ case KVM_DEV_XIVE_GET_TIMA_FD:
+ return kvmppc_xive_native_get_tima_fd(xive, attr->addr);
}
break;
}
@@ -261,6 +317,7 @@ static int kvmppc_xive_native_has_attr(struct kvm_device *dev,
case KVM_DEV_XIVE_GRP_CTRL:
switch (attr->attr) {
case KVM_DEV_XIVE_GET_ESB_FD:
+ case KVM_DEV_XIVE_GET_TIMA_FD:
return 0;
}
break;
@@ -521,6 +521,9 @@ u32 xive_native_default_eq_shift(void)
}
EXPORT_SYMBOL_GPL(xive_native_default_eq_shift);
+unsigned long xive_tima_os;
+EXPORT_SYMBOL_GPL(xive_tima_os);
+
bool __init xive_native_init(void)
{
struct device_node *np;
@@ -573,6 +576,14 @@ bool __init xive_native_init(void)
for_each_possible_cpu(cpu)
kvmppc_set_xive_tima(cpu, r.start, tima);
+ /* Resource 2 is OS window */
+ if (of_address_to_resource(np, 2, &r)) {
+ pr_err("Failed to get thread mgmnt area resource\n");
+ return false;
+ }
+
+ xive_tima_os = r.start;
+
/* Grab size of provisionning pages */
xive_parse_provisioning(np);
This will let the guest create a memory mapping to expose the XIVE MMIO region (TIMA) used for interrupt management at the CPU level. Signed-off-by: Cédric Le Goater <clg@kaod.org> --- arch/powerpc/include/asm/xive.h | 1 + arch/powerpc/include/uapi/asm/kvm.h | 1 + arch/powerpc/kvm/book3s_xive_native.c | 57 +++++++++++++++++++++++++++ arch/powerpc/sysdev/xive/native.c | 11 ++++++ 4 files changed, 70 insertions(+)