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[21/29] KVM: x86: Explicitly #define the VCPU_REGS_* indices

Message ID 20190118212037.24412-22-sean.j.christopherson@intel.com
State New, archived
Headers show
Series KVM: VMX: Move vCPU-run to proper asm sub-routine | expand

Commit Message

Sean Christopherson Jan. 18, 2019, 9:20 p.m. UTC
Declaring the VCPU_REGS_* as enums allows for more robust C code, but it
prevents using the values in assembly files.  Expliciting #define the
indices in an asm-friendly file to prepare for VMX moving its transition
code to a proper assembly file, but keep the enums for general usage.

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
---
 arch/x86/include/asm/kvm_host.h      | 33 ++++++++++++++--------------
 arch/x86/include/asm/kvm_vcpu_regs.h | 26 ++++++++++++++++++++++
 2 files changed, 43 insertions(+), 16 deletions(-)
 create mode 100644 arch/x86/include/asm/kvm_vcpu_regs.h

Comments

Paolo Bonzini Jan. 22, 2019, 11:35 a.m. UTC | #1
On 18/01/19 22:20, Sean Christopherson wrote:
>  enum kvm_reg {
> -	VCPU_REGS_RAX = 0,
> -	VCPU_REGS_RCX = 1,
> -	VCPU_REGS_RDX = 2,
> -	VCPU_REGS_RBX = 3,
> -	VCPU_REGS_RSP = 4,
> -	VCPU_REGS_RBP = 5,
> -	VCPU_REGS_RSI = 6,
> -	VCPU_REGS_RDI = 7,
> +	VCPU_REGS_RAX = VCPU_RAX_IDX,
> +	VCPU_REGS_RCX = VCPU_RCX_IDX,
> +	VCPU_REGS_RDX = VCPU_RDX_IDX,
> +	VCPU_REGS_RBX = VCPU_RBX_IDX,
> +	VCPU_REGS_RSP = VCPU_RSP_IDX,
> +	VCPU_REGS_RBP = VCPU_RBP_IDX,
> +	VCPU_REGS_RSI = VCPU_RSI_IDX,
> +	VCPU_REGS_RDI = VCPU_RDI_IDX,

Perhaps a better name for the #defines is __VCPU_REGS_Rxx?

Paolo
diff mbox series

Patch

diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 4660ce90de7f..076e316740ab 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -35,6 +35,7 @@ 
 #include <asm/msr-index.h>
 #include <asm/asm.h>
 #include <asm/kvm_page_track.h>
+#include <asm/kvm_vcpu_regs.h>
 #include <asm/hyperv-tlfs.h>
 
 #define KVM_MAX_VCPUS 288
@@ -137,23 +138,23 @@  static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
 #define ASYNC_PF_PER_VCPU 64
 
 enum kvm_reg {
-	VCPU_REGS_RAX = 0,
-	VCPU_REGS_RCX = 1,
-	VCPU_REGS_RDX = 2,
-	VCPU_REGS_RBX = 3,
-	VCPU_REGS_RSP = 4,
-	VCPU_REGS_RBP = 5,
-	VCPU_REGS_RSI = 6,
-	VCPU_REGS_RDI = 7,
+	VCPU_REGS_RAX = VCPU_RAX_IDX,
+	VCPU_REGS_RCX = VCPU_RCX_IDX,
+	VCPU_REGS_RDX = VCPU_RDX_IDX,
+	VCPU_REGS_RBX = VCPU_RBX_IDX,
+	VCPU_REGS_RSP = VCPU_RSP_IDX,
+	VCPU_REGS_RBP = VCPU_RBP_IDX,
+	VCPU_REGS_RSI = VCPU_RSI_IDX,
+	VCPU_REGS_RDI = VCPU_RDI_IDX,
 #ifdef CONFIG_X86_64
-	VCPU_REGS_R8 = 8,
-	VCPU_REGS_R9 = 9,
-	VCPU_REGS_R10 = 10,
-	VCPU_REGS_R11 = 11,
-	VCPU_REGS_R12 = 12,
-	VCPU_REGS_R13 = 13,
-	VCPU_REGS_R14 = 14,
-	VCPU_REGS_R15 = 15,
+	VCPU_REGS_R8  = VCPU_R8_IDX,
+	VCPU_REGS_R9  = VCPU_R9_IDX,
+	VCPU_REGS_R10 = VCPU_R10_IDX,
+	VCPU_REGS_R11 = VCPU_R11_IDX,
+	VCPU_REGS_R12 = VCPU_R12_IDX,
+	VCPU_REGS_R13 = VCPU_R13_IDX,
+	VCPU_REGS_R14 = VCPU_R14_IDX,
+	VCPU_REGS_R15 = VCPU_R15_IDX,
 #endif
 	VCPU_REGS_RIP,
 	NR_VCPU_REGS
diff --git a/arch/x86/include/asm/kvm_vcpu_regs.h b/arch/x86/include/asm/kvm_vcpu_regs.h
new file mode 100644
index 000000000000..b2d2fe86ade0
--- /dev/null
+++ b/arch/x86/include/asm/kvm_vcpu_regs.h
@@ -0,0 +1,26 @@ 
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_X86_KVM_VCPU_REGS_H
+#define _ASM_X86_KVM_VCPU_REGS_H
+
+#define VCPU_RAX_IDX 0
+#define VCPU_RCX_IDX 1
+#define VCPU_RDX_IDX 2
+#define VCPU_RBX_IDX 3
+#define VCPU_RSP_IDX 4
+#define VCPU_RBP_IDX 5
+#define VCPU_RSI_IDX 6
+#define VCPU_RDI_IDX 7
+
+#ifdef CONFIG_X86_64
+#define VCPU_R8_IDX  8
+#define VCPU_R9_IDX  9
+#define VCPU_R10_IDX 10
+#define VCPU_R11_IDX 11
+#define VCPU_R12_IDX 12
+#define VCPU_R13_IDX 13
+#define VCPU_R14_IDX 14
+#define VCPU_R15_IDX 15
+#endif
+
+#endif /* _ASM_X86_KVM_VCPU_REGS_H */
+