diff mbox series

[3/5] x86/kvm: Convert some slow-path static_cpu_has() callers to boot_cpu_has()

Message ID 20190330112022.28888-4-bp@alien8.de (mailing list archive)
State New, archived
Headers show
Series None | expand

Commit Message

Borislav Petkov March 30, 2019, 11:20 a.m. UTC 
From: Borislav Petkov <bp@suse.de>

Using static_cpu_has() is pointless on those paths, convert them to the
boot_cpu_has() variant.

No functional changes.

Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: kvm@vger.kernel.org
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: x86@kernel.org
---
 arch/x86/kvm/svm.c     | 10 +++++-----
 arch/x86/kvm/vmx/vmx.c |  4 ++--
 2 files changed, 7 insertions(+), 7 deletions(-)

Comments

Paolo Bonzini March 31, 2019, 2:20 p.m. UTC | #1 
On 30/03/19 12:20, Borislav Petkov wrote:
> @@ -2252,7 +2252,7 @@ static void svm_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
>  	for (i = 0; i < NR_HOST_SAVE_USER_MSRS; i++)
>  		rdmsrl(host_save_user_msrs[i], svm->host_user_msrs[i]);
>  
> -	if (static_cpu_has(X86_FEATURE_TSCRATEMSR)) {
> +	if (boot_cpu_has(X86_FEATURE_TSCRATEMSR)) {
>  		u64 tsc_ratio = vcpu->arch.tsc_scaling_ratio;
>  		if (tsc_ratio != __this_cpu_read(current_tsc_ratio)) {
>  			__this_cpu_write(current_tsc_ratio, tsc_ratio);
> @@ -2260,7 +2260,7 @@ static void svm_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
>  		}
>  	}
>  	/* This assumes that the kernel never uses MSR_TSC_AUX */
> -	if (static_cpu_has(X86_FEATURE_RDTSCP))
> +	if (boot_cpu_has(X86_FEATURE_RDTSCP))
>  		wrmsrl(MSR_TSC_AUX, svm->tsc_aux);
>  
>  	if (sd->current_vmcb != svm->vmcb) {
> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index c73375e01ab8..0cb0d26564ca 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -6423,7 +6423,7 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu)
>  	if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
>  		vmx_set_interrupt_shadow(vcpu, 0);
>  
> -	if (static_cpu_has(X86_FEATURE_PKU) &&
> +	if (boot_cpu_has(X86_FEATURE_PKU) &&
>  	    kvm_read_cr4_bits(vcpu, X86_CR4_PKE) &&
>  	    vcpu->arch.pkru != vmx->host_pkru)
>  		__write_pkru(vcpu->arch.pkru);
> @@ -6512,7 +6512,7 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu)
>  	 * back on host, so it is safe to read guest PKRU from current
>  	 * XSAVE.
>  	 */
> -	if (static_cpu_has(X86_FEATURE_PKU) &&
> +	if (boot_cpu_has(X86_FEATURE_PKU) &&
>  	    kvm_read_cr4_bits(vcpu, X86_CR4_PKE)) {
>  		vcpu->arch.pkru = __read_pkru();

These are not slow path.

Paolo
Borislav Petkov March 31, 2019, 3:12 p.m. UTC | #2 
On Sun, Mar 31, 2019 at 04:20:11PM +0200, Paolo Bonzini wrote:
> These are not slow path.

Those functions do a *lot* of stuff like a bunch of MSR reads which are
tens of cycles each at least.

I don't think a RIP-relative MOV and a BT:

        movq    boot_cpu_data+20(%rip), %rax    # MEM[(const long unsigned int *)&boot_cpu_data + 20B], _45
        btq     $59, %rax       #, _45

are at all noticeable.

On latest AMD and Intel uarch those are 2-4 cycles, according to

https://agner.org/optimize/instruction_tables.ods
Paolo Bonzini April 1, 2019, 7:24 a.m. UTC | #3 
On 31/03/19 17:12, Borislav Petkov wrote:
> On Sun, Mar 31, 2019 at 04:20:11PM +0200, Paolo Bonzini wrote:
>> These are not slow path.
> 
> Those functions do a *lot* of stuff like a bunch of MSR reads which are
> tens of cycles each at least.

The MSR reads and writes are not done in the common case.  Also, you
cannot really expect boot_cpu_data to be in L1 in these functions since
they run after the guest---or if they do, each L1 line you fill in with
host data is one line you "steal" from the guest.

Paolo

> I don't think a RIP-relative MOV and a BT:
> 
>         movq    boot_cpu_data+20(%rip), %rax    # MEM[(const long unsigned int *)&boot_cpu_data + 20B], _45
>         btq     $59, %rax       #, _45
> 
> are at all noticeable.
> 
> On latest AMD and Intel uarch those are 2-4 cycles, according to
> 
> https://agner.org/optimize/instruction_tables.ods
>
Borislav Petkov April 1, 2019, 7:33 a.m. UTC | #4 
On Mon, Apr 01, 2019 at 09:24:06AM +0200, Paolo Bonzini wrote:
> The MSR reads and writes are not done in the common case.  Also, you
> cannot really expect boot_cpu_data to be in L1 in these functions since
> they run after the guest---or if they do, each L1 line you fill in with
> host data is one line you "steal" from the guest.

Ok, fair enough. I'll drop this patch.
diff mbox series

Patch

diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index b5b128a0a051..ecc6aba37b8f 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -835,7 +835,7 @@  static void svm_init_erratum_383(void)
 	int err;
 	u64 val;
 
-	if (!static_cpu_has_bug(X86_BUG_AMD_TLB_MMATCH))
+	if (!boot_cpu_has_bug(X86_BUG_AMD_TLB_MMATCH))
 		return;
 
 	/* Use _safe variants to not break nested virtualization */
@@ -889,7 +889,7 @@  static int has_svm(void)
 static void svm_hardware_disable(void)
 {
 	/* Make sure we clean up behind us */
-	if (static_cpu_has(X86_FEATURE_TSCRATEMSR))
+	if (boot_cpu_has(X86_FEATURE_TSCRATEMSR))
 		wrmsrl(MSR_AMD64_TSC_RATIO, TSC_RATIO_DEFAULT);
 
 	cpu_svm_disable();
@@ -931,7 +931,7 @@  static int svm_hardware_enable(void)
 
 	wrmsrl(MSR_VM_HSAVE_PA, page_to_pfn(sd->save_area) << PAGE_SHIFT);
 
-	if (static_cpu_has(X86_FEATURE_TSCRATEMSR)) {
+	if (boot_cpu_has(X86_FEATURE_TSCRATEMSR)) {
 		wrmsrl(MSR_AMD64_TSC_RATIO, TSC_RATIO_DEFAULT);
 		__this_cpu_write(current_tsc_ratio, TSC_RATIO_DEFAULT);
 	}
@@ -2252,7 +2252,7 @@  static void svm_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 	for (i = 0; i < NR_HOST_SAVE_USER_MSRS; i++)
 		rdmsrl(host_save_user_msrs[i], svm->host_user_msrs[i]);
 
-	if (static_cpu_has(X86_FEATURE_TSCRATEMSR)) {
+	if (boot_cpu_has(X86_FEATURE_TSCRATEMSR)) {
 		u64 tsc_ratio = vcpu->arch.tsc_scaling_ratio;
 		if (tsc_ratio != __this_cpu_read(current_tsc_ratio)) {
 			__this_cpu_write(current_tsc_ratio, tsc_ratio);
@@ -2260,7 +2260,7 @@  static void svm_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 		}
 	}
 	/* This assumes that the kernel never uses MSR_TSC_AUX */
-	if (static_cpu_has(X86_FEATURE_RDTSCP))
+	if (boot_cpu_has(X86_FEATURE_RDTSCP))
 		wrmsrl(MSR_TSC_AUX, svm->tsc_aux);
 
 	if (sd->current_vmcb != svm->vmcb) {
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index c73375e01ab8..0cb0d26564ca 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -6423,7 +6423,7 @@  static void vmx_vcpu_run(struct kvm_vcpu *vcpu)
 	if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
 		vmx_set_interrupt_shadow(vcpu, 0);
 
-	if (static_cpu_has(X86_FEATURE_PKU) &&
+	if (boot_cpu_has(X86_FEATURE_PKU) &&
 	    kvm_read_cr4_bits(vcpu, X86_CR4_PKE) &&
 	    vcpu->arch.pkru != vmx->host_pkru)
 		__write_pkru(vcpu->arch.pkru);
@@ -6512,7 +6512,7 @@  static void vmx_vcpu_run(struct kvm_vcpu *vcpu)
 	 * back on host, so it is safe to read guest PKRU from current
 	 * XSAVE.
 	 */
-	if (static_cpu_has(X86_FEATURE_PKU) &&
+	if (boot_cpu_has(X86_FEATURE_PKU) &&
 	    kvm_read_cr4_bits(vcpu, X86_CR4_PKE)) {
 		vcpu->arch.pkru = __read_pkru();
 		if (vcpu->arch.pkru != vmx->host_pkru)