| Message ID | 20190430140926.3204-1-nadav.amit@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [kvm-unit-tests] x86: Change ALTERNATE_APIC_BASE to saner value | expand |
On 30/04/19 16:09, nadav.amit@gmail.com wrote: > From: Nadav Amit <nadav.amit@gmail.com> > > According to the SDM, during initialization, the BSP "Switches to > protected mode and ensures that the APIC address space is mapped to the > strong uncacheable (UC) memory type." This requirement is not followed > when the tests that relocate the APIC. > > Use the TPM base address for the alternate local-APIC base, as it is > expected to be set as uncacheable by the BIOS. > > Cc: Sean Christopherson <sean.j.christopherson@intel.com> > Suggested-by: Sean Christopherson <sean.j.christopherson@intel.com> > Signed-off-by: Nadav Amit <nadav.amit@gmail.com> > --- > x86/apic.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/x86/apic.c b/x86/apic.c > index de4a181..173b8b1 100644 > --- a/x86/apic.c > +++ b/x86/apic.c > @@ -159,7 +159,7 @@ static void test_apic_disable(void) > report_prefix_pop(); > } > > -#define ALTERNATE_APIC_BASE 0x42000000 > +#define ALTERNATE_APIC_BASE 0xfed40000 > > static void test_apicbase(void) > { > Queued, thanks. Paolo
diff --git a/x86/apic.c b/x86/apic.c index de4a181..173b8b1 100644 --- a/x86/apic.c +++ b/x86/apic.c @@ -159,7 +159,7 @@ static void test_apic_disable(void) report_prefix_pop(); } -#define ALTERNATE_APIC_BASE 0x42000000 +#define ALTERNATE_APIC_BASE 0xfed40000 static void test_apicbase(void) {