From patchwork Tue Aug 6 18:56:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 11079531 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2F09414E5 for ; Tue, 6 Aug 2019 18:57:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 21F7A28864 for ; Tue, 6 Aug 2019 18:57:20 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 161EA28876; Tue, 6 Aug 2019 18:57:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B4B7728864 for ; Tue, 6 Aug 2019 18:57:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726731AbfHFS5T (ORCPT ); Tue, 6 Aug 2019 14:57:19 -0400 Received: from mga06.intel.com ([134.134.136.31]:40914 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726350AbfHFS5J (ORCPT ); Tue, 6 Aug 2019 14:57:09 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Aug 2019 11:57:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,353,1559545200"; d="scan'208";a="176715111" Received: from sjchrist-coffee.jf.intel.com ([10.54.74.41]) by orsmga003.jf.intel.com with ESMTP; 06 Aug 2019 11:57:00 -0700 From: Sean Christopherson To: Eduardo Habkost , Igor Mammedov , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , Cornelia Huck , Eric Blake , Markus Armbruster , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org Subject: [RFC PATCH 16/20] hw/i386/pc: Account for SGX EPC sections when calculating device memory Date: Tue, 6 Aug 2019 11:56:45 -0700 Message-Id: <20190806185649.2476-17-sean.j.christopherson@intel.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190806185649.2476-1-sean.j.christopherson@intel.com> References: <20190806185649.2476-1-sean.j.christopherson@intel.com> MIME-Version: 1.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add helpers to detect if SGX EPC exists above 4g, and if so, where SGX EPC above 4g ends. Use the helpers to adjust the device memory range if SGX EPC exists above 4g. Note that SGX EPC is currently hardcoded to reside above 4g. Signed-off-by: Sean Christopherson --- hw/i386/pc.c | 10 +++++++++- include/hw/i386/sgx-epc.h | 12 ++++++++++++ 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 8c8b404799..614d464394 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1882,8 +1882,14 @@ void pc_memory_init(PCMachineState *pcms, exit(EXIT_FAILURE); } + if (sgx_epc_above_4g(pcms->sgx_epc)) { + machine->device_memory->base = sgx_epc_above_4g_end(pcms->sgx_epc); + } else { + machine->device_memory->base = + 0x100000000ULL + pcms->above_4g_mem_size; + } machine->device_memory->base = - ROUND_UP(0x100000000ULL + pcms->above_4g_mem_size, 1 * GiB); + ROUND_UP(machine->device_memory->base, 1 * GiB); if (pcmc->enforce_aligned_dimm) { /* size device region assuming 1G page max alignment per slot */ @@ -1962,6 +1968,8 @@ uint64_t pc_pci_hole64_start(void) if (!pcmc->broken_reserved_end) { hole64_start += memory_region_size(&ms->device_memory->mr); } + } else if (sgx_epc_above_4g(pcms->sgx_epc)) { + hole64_start = sgx_epc_above_4g_end(pcms->sgx_epc); } else { hole64_start = 0x100000000ULL + pcms->above_4g_mem_size; } diff --git a/include/hw/i386/sgx-epc.h b/include/hw/i386/sgx-epc.h index 91ed4773e3..136449cd80 100644 --- a/include/hw/i386/sgx-epc.h +++ b/include/hw/i386/sgx-epc.h @@ -60,4 +60,16 @@ extern int sgx_epc_enabled; void pc_machine_init_sgx_epc(PCMachineState *pcms); int sgx_epc_get_section(int section_nr, uint64_t *addr, uint64_t *size); +static inline bool sgx_epc_above_4g(SGXEPCState *sgx_epc) +{ + return sgx_epc != NULL; +} + +static inline uint64_t sgx_epc_above_4g_end(SGXEPCState *sgx_epc) +{ + assert(sgx_epc != NULL && sgx_epc->base >= 0x100000000ULL); + + return sgx_epc->base + sgx_epc->size; +} + #endif