@@ -58,6 +58,7 @@ int main(void)
OFFSET(GEN_LC_SW_INT_FPRS, lowcore, sw_int_fprs);
OFFSET(GEN_LC_SW_INT_FPC, lowcore, sw_int_fpc);
OFFSET(GEN_LC_SW_INT_CRS, lowcore, sw_int_crs);
+ OFFSET(GEN_LC_SW_INT_PSW, lowcore, sw_int_psw);
OFFSET(GEN_LC_MCCK_EXT_SA_ADDR, lowcore, mcck_ext_sa_addr);
OFFSET(GEN_LC_FPRS_SA, lowcore, fprs_sa);
OFFSET(GEN_LC_GRS_SA, lowcore, grs_sa);
@@ -79,7 +79,8 @@ struct lowcore {
uint32_t sw_int_fpc; /* 0x0300 */
uint8_t pad_0x0304[0x0308 - 0x0304]; /* 0x0304 */
uint64_t sw_int_crs[16]; /* 0x0308 */
- uint8_t pad_0x0310[0x11b0 - 0x0388]; /* 0x0388 */
+ struct psw sw_int_psw; /* 0x0388 */
+ uint8_t pad_0x0310[0x11b0 - 0x0398]; /* 0x0398 */
uint64_t mcck_ext_sa_addr; /* 0x11b0 */
uint8_t pad_0x11b8[0x1200 - 0x11b8]; /* 0x11b8 */
uint64_t fprs_sa[16]; /* 0x1200 */
@@ -98,6 +99,7 @@ struct lowcore {
uint8_t pad_0x1400[0x1800 - 0x1400]; /* 0x1400 */
uint8_t pgm_int_tdb[0x1900 - 0x1800]; /* 0x1800 */
} __attribute__ ((__packed__));
+_Static_assert(sizeof(struct lowcore) == 0x1900, "Lowcore size");
#define PGM_INT_CODE_OPERATION 0x01
#define PGM_INT_CODE_PRIVILEGED_OPERATION 0x02
@@ -126,13 +126,18 @@ memsetxc:
.globl diag308_load_reset
diag308_load_reset:
SAVE_REGS
- /* Save the first PSW word to the IPL PSW */
+ /* Backup current PSW mask, as we have to restore it on success */
epsw %r0, %r1
- st %r0, 0
- /* Store the address and the bit for 31 bit addressing */
- larl %r0, 0f
- oilh %r0, 0x8000
- st %r0, 0x4
+ st %r0, GEN_LC_SW_INT_PSW
+ st %r1, GEN_LC_SW_INT_PSW + 4
+ /* Load reset psw mask (short psw, 64 bit) */
+ lg %r0, reset_psw
+ /* Load the success label address */
+ larl %r1, 0f
+ /* Or it to the mask */
+ ogr %r0, %r1
+ /* Store it at the reset PSW location (real 0x0) */
+ stg %r0, 0
/* Do the reset */
diag %r0,%r2,0x308
/* Failure path */
@@ -144,7 +149,10 @@ diag308_load_reset:
lctlg %c0, %c0, 0(%r1)
RESTORE_REGS
lhi %r2, 1
- br %r14
+ larl %r0, 1f
+ stg %r0, GEN_LC_SW_INT_PSW + 8
+ lpswe GEN_LC_SW_INT_PSW
+1: br %r14
.globl smp_cpu_setup_state
smp_cpu_setup_state:
@@ -184,6 +192,8 @@ svc_int:
lpswe GEN_LC_SVC_OLD_PSW
.align 8
+reset_psw:
+ .quad 0x0008000180000000
initial_psw:
.quad 0x0000000180000000, clear_bss_start
pgm_int_psw: