| Message ID | 20191119083359.15319-1-chenyi.qiang@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | KVM: nVMX: add CR4_LA57 bit to nested CR4_FIXED1 | expand |
> On 19 Nov 2019, at 10:33, Chenyi Qiang <chenyi.qiang@intel.com> wrote: > > When L1 guest uses 5-level paging, it fails vm-entry to L2 due to > invalid host-state. It needs to add CR4_LA57 bit to nested CR4_FIXED1 > MSR. > > Signed-off-by: Chenyi Qiang <chenyi.qiang@intel.com> > Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Liran Alon <liran.alon@oracle.com> > --- > arch/x86/kvm/vmx/vmx.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c > index 621142e55e28..89253d60e23a 100644 > --- a/arch/x86/kvm/vmx/vmx.c > +++ b/arch/x86/kvm/vmx/vmx.c > @@ -6962,6 +6962,7 @@ static void nested_vmx_cr_fixed1_bits_update(struct kvm_vcpu *vcpu) > cr4_fixed1_update(X86_CR4_SMAP, ebx, bit(X86_FEATURE_SMAP)); > cr4_fixed1_update(X86_CR4_PKE, ecx, bit(X86_FEATURE_PKU)); > cr4_fixed1_update(X86_CR4_UMIP, ecx, bit(X86_FEATURE_UMIP)); > + cr4_fixed1_update(X86_CR4_LA57, ecx, bit(X86_FEATURE_LA57)); > > #undef cr4_fixed1_update > } > -- > 2.17.1 >
On 19/11/19 12:09, Liran Alon wrote:
> Reviewed-by: Liran Alon <liran.alon@oracle.com>
Queued, thanks.
Paolo
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 621142e55e28..89253d60e23a 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -6962,6 +6962,7 @@ static void nested_vmx_cr_fixed1_bits_update(struct kvm_vcpu *vcpu) cr4_fixed1_update(X86_CR4_SMAP, ebx, bit(X86_FEATURE_SMAP)); cr4_fixed1_update(X86_CR4_PKE, ecx, bit(X86_FEATURE_PKU)); cr4_fixed1_update(X86_CR4_UMIP, ecx, bit(X86_FEATURE_UMIP)); + cr4_fixed1_update(X86_CR4_LA57, ecx, bit(X86_FEATURE_LA57)); #undef cr4_fixed1_update }