From patchwork Thu Nov 28 02:25:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolu Lu X-Patchwork-Id: 11265287 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 221F113A4 for ; Thu, 28 Nov 2019 02:30:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0AD392166E for ; Thu, 28 Nov 2019 02:30:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728351AbfK1CaO (ORCPT ); Wed, 27 Nov 2019 21:30:14 -0500 Received: from mga18.intel.com ([134.134.136.126]:17935 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728365AbfK1CaN (ORCPT ); Wed, 27 Nov 2019 21:30:13 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Nov 2019 18:30:12 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,251,1571727600"; d="scan'208";a="221176214" Received: from allen-box.sh.intel.com ([10.239.159.136]) by orsmga002.jf.intel.com with ESMTP; 27 Nov 2019 18:30:09 -0800 From: Lu Baolu To: Joerg Roedel , David Woodhouse , Alex Williamson Cc: ashok.raj@intel.com, sanjay.k.kumar@intel.com, jacob.jun.pan@linux.intel.com, kevin.tian@intel.com, yi.l.liu@intel.com, yi.y.sun@intel.com, Peter Xu , iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Lu Baolu , Yi Sun Subject: [PATCH v2 6/8] iommu/vt-d: Implement first level page table ops Date: Thu, 28 Nov 2019 10:25:48 +0800 Message-Id: <20191128022550.9832-7-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191128022550.9832-1-baolu.lu@linux.intel.com> References: <20191128022550.9832-1-baolu.lu@linux.intel.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org This adds the implementation of page table callbacks for the first level page table. Cc: Ashok Raj Cc: Jacob Pan Cc: Kevin Tian Cc: Liu Yi L Cc: Yi Sun Signed-off-by: Lu Baolu --- drivers/iommu/intel-iommu.c | 56 +++++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index a314892ee72b..695a7a5fbe8e 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -414,6 +414,7 @@ int for_each_device_domain(int (*fn)(struct device_domain_info *info, } const struct iommu_ops intel_iommu_ops; +static const struct pgtable_ops first_lvl_pgtable_ops; static const struct pgtable_ops second_lvl_pgtable_ops; static bool translation_pre_enabled(struct intel_iommu *iommu) @@ -2330,6 +2331,61 @@ static int __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn, return 0; } +static int first_lvl_domain_map_range(struct dmar_domain *domain, + unsigned long iova, phys_addr_t paddr, + size_t size, int prot) +{ + return first_lvl_map_range(domain, PAGE_ALIGN(iova), + round_up(iova + size, PAGE_SIZE), + PAGE_ALIGN(paddr), prot); +} + +static struct page * +first_lvl_domain_unmap_range(struct dmar_domain *domain, + unsigned long iova, size_t size) +{ + return first_lvl_unmap_range(domain, PAGE_ALIGN(iova), + round_up(iova + size, PAGE_SIZE)); +} + +static phys_addr_t +first_lvl_domain_iova_to_phys(struct dmar_domain *domain, + unsigned long iova) +{ + return first_lvl_iova_to_phys(domain, iova); +} + +static void +first_lvl_domain_flush_tlb_range(struct dmar_domain *domain, + struct intel_iommu *iommu, + unsigned long iova, size_t size, bool ih) +{ + unsigned long pages = aligned_nrpages(iova, size); + u16 did = domain->iommu_did[iommu->seq_id]; + unsigned int mask; + + if (pages) { + mask = ilog2(__roundup_pow_of_two(pages)); + iova &= (u64)-1 << (VTD_PAGE_SHIFT + mask); + } else { + mask = MAX_AGAW_PFN_WIDTH; + iova = 0; + pages = -1; + } + + iommu->flush.p_iotlb_inv(iommu, did, domain->default_pasid, + iova, pages, ih); + + iommu_flush_dev_iotlb(domain, iova, mask); +} + +static const struct pgtable_ops first_lvl_pgtable_ops = { + .map_range = first_lvl_domain_map_range, + .unmap_range = first_lvl_domain_unmap_range, + .iova_to_phys = first_lvl_domain_iova_to_phys, + .flush_tlb_range = first_lvl_domain_flush_tlb_range, +}; + static int second_lvl_domain_map_range(struct dmar_domain *domain, unsigned long iova, phys_addr_t paddr, size_t size, int prot)