@@ -22,5 +22,5 @@ extern void mmu_set_range_sect(pgd_t *pgtable, uintptr_t virt_offset,
extern void mmu_set_range_ptes(pgd_t *pgtable, uintptr_t virt_offset,
phys_addr_t phys_start, phys_addr_t phys_end,
pgprot_t prot);
-extern void mmu_clear_user(unsigned long vaddr);
+extern void mmu_clear_user(pgd_t *pgtable, unsigned long vaddr);
#endif
@@ -14,6 +14,8 @@
#define PGDIR_SIZE (_AC(1,UL) << PGDIR_SHIFT)
#define PGDIR_MASK (~((1 << PGDIR_SHIFT) - 1))
+#define PGD_VALID (_AT(pgdval_t, 1) << 0)
+
#define PTRS_PER_PTE 512
#define PTRS_PER_PMD 512
@@ -54,6 +56,7 @@
#define PMD_TYPE_FAULT (_AT(pmdval_t, 0) << 0)
#define PMD_TYPE_TABLE (_AT(pmdval_t, 3) << 0)
#define PMD_TYPE_SECT (_AT(pmdval_t, 1) << 0)
+#define PMD_SECT_VALID (_AT(pmdval_t, 1) << 0)
#define PMD_TABLE_BIT (_AT(pmdval_t, 1) << 1)
#define PMD_BIT4 (_AT(pmdval_t, 0))
#define PMD_DOMAIN(x) (_AT(pmdval_t, 0))
@@ -29,6 +29,13 @@
#define pmd_none(pmd) (!pmd_val(pmd))
#define pte_none(pte) (!pte_val(pte))
+#define pgd_valid(pgd) (pgd_val(pgd) & PGD_VALID)
+#define pmd_valid(pmd) (pmd_val(pmd) & PMD_SECT_VALID)
+#define pte_valid(pte) (pte_val(pte) & L_PTE_VALID)
+
+#define pmd_huge(pmd) \
+ ((pmd_val(pmd) & PMD_TYPE_MASK) == PMD_TYPE_SECT)
+
#define pgd_index(addr) \
(((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
#define pgd_offset(pgtable, addr) ((pgtable) + pgd_index(addr))
@@ -22,6 +22,8 @@
#define PGDIR_MASK (~(PGDIR_SIZE-1))
#define PTRS_PER_PGD (1 << (VA_BITS - PGDIR_SHIFT))
+#define PGD_VALID (_AT(pgdval_t, 1) << 0)
+
/* From include/asm-generic/pgtable-nopmd.h */
#define PMD_SHIFT PGDIR_SHIFT
#define PTRS_PER_PMD 1
@@ -71,6 +73,7 @@
#define PTE_TYPE_MASK (_AT(pteval_t, 3) << 0)
#define PTE_TYPE_FAULT (_AT(pteval_t, 0) << 0)
#define PTE_TYPE_PAGE (_AT(pteval_t, 3) << 0)
+#define PTE_VALID (_AT(pteval_t, 1) << 0)
#define PTE_TABLE_BIT (_AT(pteval_t, 1) << 1)
#define PTE_USER (_AT(pteval_t, 1) << 6) /* AP[1] */
#define PTE_RDONLY (_AT(pteval_t, 1) << 7) /* AP[2] */
@@ -33,6 +33,13 @@
#define pmd_none(pmd) (!pmd_val(pmd))
#define pte_none(pte) (!pte_val(pte))
+#define pgd_valid(pgd) (pgd_val(pgd) & PGD_VALID)
+#define pmd_valid(pmd) (pmd_val(pmd) & PMD_SECT_VALID)
+#define pte_valid(pte) (pte_val(pte) & PTE_VALID)
+
+#define pmd_huge(pmd) \
+ ((pmd_val(pmd) & PMD_TYPE_MASK) == PMD_TYPE_SECT)
+
#define pgd_index(addr) \
(((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
#define pgd_offset(pgtable, addr) ((pgtable) + pgd_index(addr))
@@ -214,20 +214,32 @@ unsigned long __phys_to_virt(phys_addr_t addr)
return addr;
}
-void mmu_clear_user(unsigned long vaddr)
+void mmu_clear_user(pgd_t *pgtable, unsigned long vaddr)
{
- pgd_t *pgtable;
- pteval_t *pte;
- pteval_t entry;
+ pgd_t *pgd;
+ pmd_t *pmd;
+ pte_t *pte;
if (!mmu_enabled())
return;
- pgtable = current_thread_info()->pgtable;
- pte = get_pte(pgtable, vaddr);
+ pgd = pgd_offset(pgtable, vaddr);
+ assert(pgd_valid(*pgd));
+ pmd = pmd_offset(pgd, vaddr);
+ assert(pmd_valid(*pmd));
+
+ if (pmd_huge(*pmd)) {
+ pmd_t entry = __pmd(pmd_val(*pmd) & ~PMD_SECT_USER);
+ WRITE_ONCE(*pmd, entry);
+ goto out_flush_tlb;
+ }
- entry = *pte & ~PTE_USER;
+ pte = pte_offset(pmd, vaddr);
+ assert(pte_valid(*pte));
+ pte_t entry = __pte(pte_val(*pte) & ~PTE_USER);
WRITE_ONCE(*pte, entry);
+
+out_flush_tlb:
dsb(ishst);
flush_tlb_page(vaddr);
}
@@ -2,6 +2,7 @@
#include <alloc_page.h>
#include <asm/mmu.h>
#include <asm/processor.h>
+#include <asm/thread_info.h>
#define NTIMES (1 << 16)
@@ -47,7 +48,7 @@ static void check_code_generation(bool dcache_clean, bool icache_inval)
bool success;
/* Make sure we can execute from a writable page */
- mmu_clear_user((unsigned long)code);
+ mmu_clear_user(current_thread_info()->pgtable, (unsigned long)code);
sctlr = read_sysreg(sctlr_el1);
if (sctlr & SCTLR_EL1_WXN) {
kvm-unit-tests uses block mappings, so let's expand the mmu_clear_user function to handle those as well. Now that the function knows about block mappings, we cannot simply assume that if an address isn't mapped we can map it as a regular page. Change the semantics of the function to fail quite loudly if the address isn't mapped, and shift the burden on the caller to map the address as a page or block mapping before calling mmu_clear_user. Also make mmu_clear_user more flexible by adding a pgtable parameter, instead of assuming that the change always applies to the current translation tables. Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> --- lib/arm/asm/mmu-api.h | 2 +- lib/arm/asm/pgtable-hwdef.h | 3 +++ lib/arm/asm/pgtable.h | 7 +++++++ lib/arm64/asm/pgtable-hwdef.h | 3 +++ lib/arm64/asm/pgtable.h | 7 +++++++ lib/arm/mmu.c | 26 +++++++++++++++++++------- arm/cache.c | 3 ++- 7 files changed, 42 insertions(+), 9 deletions(-)