@@ -139,6 +139,7 @@ extern void set_lpi_config(int n, u8 val);
extern u8 get_lpi_config(int n);
extern void set_pending_table_bit(int rdist, int n, bool set);
extern void gicv3_rdist_ctrl_lpi(u32 redist, bool set);
+extern void its_enable_defaults(void);
#endif /* !__ASSEMBLY__ */
#endif /* _ASMARM_GIC_V3_ITS_H_ */
@@ -243,3 +243,44 @@ void gicv3_rdist_ctrl_lpi(u32 redist, bool set)
val &= ~GICR_CTLR_ENABLE_LPIS;
writel(val, ptr + GICR_CTLR);
}
+
+void its_enable_defaults(void)
+{
+ unsigned int i;
+
+ its_parse_typer();
+
+ /* Allocate BASER tables (device and collection tables) */
+ for (i = 0; i < GITS_BASER_NR_REGS; i++) {
+ struct its_baser *baser = &its_data.baser[i];
+ int ret;
+
+ ret = its_parse_baser(i, baser);
+ if (ret)
+ continue;
+
+ switch (baser->type) {
+ case GITS_BASER_TYPE_DEVICE:
+ baser->valid = true;
+ baser->cache = GITS_BASER_nCnB;
+ its_setup_baser(i, baser);
+ break;
+ case GITS_BASER_TYPE_COLLECTION:
+ baser->valid = true;
+ its_setup_baser(i, baser);
+ break;
+ default:
+ break;
+ }
+ }
+
+ /* Allocate LPI config and pending tables */
+ alloc_lpi_tables();
+
+ init_cmd_queue();
+
+ for (i = 0; i < nr_cpus; i++)
+ gicv3_rdist_ctrl_lpi(i, true);
+
+ writel(GITS_CTLR_ENABLE, its_data.base + GITS_CTLR);
+}
its_enable_defaults() is the top init function that allocates all the requested tables (device, collection, lpi config and pending tables), enable LPIs at distributor level and ITS level. gicv3_enable_defaults must be called before. Signed-off-by: Eric Auger <eric.auger@redhat.com> --- lib/arm/asm/gic-v3-its.h | 1 + lib/arm/gic-v3-its.c | 41 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 42 insertions(+)