@@ -17,13 +17,6 @@
#define ARCH_TIMER_CTL_IMASK (1 << 1)
#define ARCH_TIMER_CTL_ISTATUS (1 << 2)
-enum gic_state {
- GIC_STATE_INACTIVE,
- GIC_STATE_PENDING,
- GIC_STATE_ACTIVE,
- GIC_STATE_ACTIVE_PENDING,
-};
-
static void *gic_isactiver;
static void *gic_ispendr;
static void *gic_isenabler;
@@ -47,6 +47,13 @@
#ifndef __ASSEMBLY__
#include <asm/cpumask.h>
+enum gic_state {
+ GIC_STATE_INACTIVE,
+ GIC_STATE_PENDING,
+ GIC_STATE_ACTIVE,
+ GIC_STATE_ACTIVE_PENDING,
+};
+
/*
* gic_init will try to find all known gics, and then
* initialize the gic data for the one found.
The status of each interrupt are defined by the GIC architecture and maintained by GIC hardware. They're not specified to the timer HW. Let's move this software enumeration to a more proper place. Signed-off-by: Zenghui Yu <yuzenghui@huawei.com> --- arm/timer.c | 7 ------- lib/arm/asm/gic.h | 7 +++++++ 2 files changed, 7 insertions(+), 7 deletions(-)