From patchwork Sat Apr 4 14:37:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 11474337 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DDCC91392 for ; Sat, 4 Apr 2020 14:38:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BD19220731 for ; Sat, 4 Apr 2020 14:38:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="WKi5bu9F" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726487AbgDDOi2 (ORCPT ); Sat, 4 Apr 2020 10:38:28 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:25039 "EHLO us-smtp-delivery-1.mimecast.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726132AbgDDOi1 (ORCPT ); Sat, 4 Apr 2020 10:38:27 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1586011106; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=QVuFrhT8TJhNSCuR94NxSXlIlj1+1lGH/d1K+jA+epw=; b=WKi5bu9F55tGL2gvxmfkM1IC3ui7O85S6SzD7CkfMwFayCB/Drhf3UMDWKn/NEjWRQ3Ufb 8BbW0RSUnYTbwEbgENLEhlosE/RhdB0Zi+8xtWFlvU1d1LnoAVZzsjAzSM0eJndui+3T6l gPhLISqHMLUPkvMbh8Sen/P5zLKgXSs= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-330-lLBibGidP72HqiBnmG9P-w-1; Sat, 04 Apr 2020 10:38:22 -0400 X-MC-Unique: lLBibGidP72HqiBnmG9P-w-1 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 0B54318AB2D4; Sat, 4 Apr 2020 14:38:21 +0000 (UTC) Received: from kamzik.brq.redhat.com (unknown [10.40.192.30]) by smtp.corp.redhat.com (Postfix) with ESMTP id 81CE71147D3; Sat, 4 Apr 2020 14:38:19 +0000 (UTC) From: Andrew Jones To: pbonzini@redhat.com Cc: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, Eric Auger , Peter Maydell Subject: [PULL kvm-unit-tests 17/39] arm: pmu: Don't check PMCR.IMP anymore Date: Sat, 4 Apr 2020 16:37:09 +0200 Message-Id: <20200404143731.208138-18-drjones@redhat.com> In-Reply-To: <20200404143731.208138-1-drjones@redhat.com> References: <20200404143731.208138-1-drjones@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Eric Auger check_pmcr() checks the IMP field is different than 0. However A zero IMP field is permitted by the architecture, meaning the MIDR_EL1 should be looked at instead. This causes TCG to fail this test on '-cpu max' because in that case PMCR.IMP is set equal to MIDR_EL1.Implementer which is 0. So let's remove the check_pmcr() test and just print PMCR info in the pmu_probe() function. Signed-off-by: Eric Auger Reported-by: Peter Maydell Signed-off-by: Andrew Jones --- arm/pmu.c | 39 ++++++++++++++------------------------- 1 file changed, 14 insertions(+), 25 deletions(-) diff --git a/arm/pmu.c b/arm/pmu.c index 0122f0a8a8a9..44f3543cfa49 100644 --- a/arm/pmu.c +++ b/arm/pmu.c @@ -134,29 +134,6 @@ static inline void precise_instrs_loop(int loop, uint32_t pmcr) } #endif -/* - * As a simple sanity check on the PMCR_EL0, ensure the implementer field isn't - * null. Also print out a couple other interesting fields for diagnostic - * purposes. For example, as of fall 2016, QEMU TCG mode doesn't implement - * event counters and therefore reports zero event counters, but hopefully - * support for at least the instructions event will be added in the future and - * the reported number of event counters will become nonzero. - */ -static bool check_pmcr(void) -{ - uint32_t pmcr; - - pmcr = get_pmcr(); - - report_info("PMU implementer/ID code/counters: %#x(\"%c\")/%#x/%d", - (pmcr >> PMU_PMCR_IMP_SHIFT) & PMU_PMCR_IMP_MASK, - ((pmcr >> PMU_PMCR_IMP_SHIFT) & PMU_PMCR_IMP_MASK) ? : ' ', - (pmcr >> PMU_PMCR_ID_SHIFT) & PMU_PMCR_ID_MASK, - (pmcr >> PMU_PMCR_N_SHIFT) & PMU_PMCR_N_MASK); - - return ((pmcr >> PMU_PMCR_IMP_SHIFT) & PMU_PMCR_IMP_MASK) != 0; -} - /* * Ensure that the cycle counter progresses between back-to-back reads. */ @@ -278,9 +255,22 @@ static void pmccntr64_test(void) /* Return FALSE if no PMU found, otherwise return TRUE */ static bool pmu_probe(void) { + uint32_t pmcr; + pmu_version = get_pmu_version(); + if (pmu_version == 0 || pmu_version == 0xf) + return false; + report_info("PMU version: %d", pmu_version); - return pmu_version != 0 && pmu_version != 0xf; + + pmcr = get_pmcr(); + report_info("PMU implementer/ID code/counters: %#x(\"%c\")/%#x/%d", + (pmcr >> PMU_PMCR_IMP_SHIFT) & PMU_PMCR_IMP_MASK, + ((pmcr >> PMU_PMCR_IMP_SHIFT) & PMU_PMCR_IMP_MASK) ? : ' ', + (pmcr >> PMU_PMCR_ID_SHIFT) & PMU_PMCR_ID_MASK, + (pmcr >> PMU_PMCR_N_SHIFT) & PMU_PMCR_N_MASK); + + return true; } int main(int argc, char *argv[]) @@ -301,7 +291,6 @@ int main(int argc, char *argv[]) report_prefix_push(argv[1]); if (argc > 2) cpi = atol(argv[2]); - report(check_pmcr(), "Control register"); report(check_cycles_increase(), "Monotonically increasing cycle count"); report(check_cpi(cpi), "Cycle/instruction ratio");