Message ID | 20200428231135.12903-1-sean.j.christopherson@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [kvm-unit-tests] x86: msr: Don't test bits 63:32 of SYSENTER MSRs on 32-bit builds | expand |
On 29/04/20 01:11, Sean Christopherson wrote: > Squish the "address" stuffed into SYSENTER_EIP/ESP into an unsigned long > so as to drop bits 63:32 on 32-bit builds. VMX diverges from bare metal > in the sense that the associated VMCS fields are natural width fields, > whereas the actual MSRs hold 64-bit values, even on CPUs that don't > support 64-bit mode. This causes the tests to fail if bits 63:32 are > non-zero and a VM-Exit/VM-Enter occurs on and/or between WRMSR/RDMSR, > e.g. when running the tests in L1 or deeper. > > Don't bother trying to actually test that bits 63:32 are dropped, the > behavior depends on the (virtual) CPU capabilities, not the build, and > the behavior is specific to VMX as both SVM and bare metal preserve the > full 64-bit values. And because practically no one cares about 32-bit > KVM, let alone an obscure architectural quirk that doesn't affect real > world kernels. > > Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> > --- > x86/msr.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/x86/msr.c b/x86/msr.c > index de2cb6d..f7539c3 100644 > --- a/x86/msr.c > +++ b/x86/msr.c > @@ -16,6 +16,7 @@ struct msr_info { > > > #define addr_64 0x0000123456789abcULL > +#define addr_ul (unsigned long)addr_64 > > struct msr_info msr_info[] = > { > @@ -23,10 +24,10 @@ struct msr_info msr_info[] = > .val_pairs = {{ .valid = 1, .value = 0x1234, .expected = 0x1234}} > }, > { .index = 0x00000175, .name = "MSR_IA32_SYSENTER_ESP", > - .val_pairs = {{ .valid = 1, .value = addr_64, .expected = addr_64}} > + .val_pairs = {{ .valid = 1, .value = addr_ul, .expected = addr_ul}} > }, > { .index = 0x00000176, .name = "IA32_SYSENTER_EIP", > - .val_pairs = {{ .valid = 1, .value = addr_64, .expected = addr_64}} > + .val_pairs = {{ .valid = 1, .value = addr_ul, .expected = addr_ul}} > }, > { .index = 0x000001a0, .name = "MSR_IA32_MISC_ENABLE", > // reserved: 1:2, 4:6, 8:10, 13:15, 17, 19:21, 24:33, 35:63 > Queued, thanks. Paolo
diff --git a/x86/msr.c b/x86/msr.c index de2cb6d..f7539c3 100644 --- a/x86/msr.c +++ b/x86/msr.c @@ -16,6 +16,7 @@ struct msr_info { #define addr_64 0x0000123456789abcULL +#define addr_ul (unsigned long)addr_64 struct msr_info msr_info[] = { @@ -23,10 +24,10 @@ struct msr_info msr_info[] = .val_pairs = {{ .valid = 1, .value = 0x1234, .expected = 0x1234}} }, { .index = 0x00000175, .name = "MSR_IA32_SYSENTER_ESP", - .val_pairs = {{ .valid = 1, .value = addr_64, .expected = addr_64}} + .val_pairs = {{ .valid = 1, .value = addr_ul, .expected = addr_ul}} }, { .index = 0x00000176, .name = "IA32_SYSENTER_EIP", - .val_pairs = {{ .valid = 1, .value = addr_64, .expected = addr_64}} + .val_pairs = {{ .valid = 1, .value = addr_ul, .expected = addr_ul}} }, { .index = 0x000001a0, .name = "MSR_IA32_MISC_ENABLE", // reserved: 1:2, 4:6, 8:10, 13:15, 17, 19:21, 24:33, 35:63
Squish the "address" stuffed into SYSENTER_EIP/ESP into an unsigned long so as to drop bits 63:32 on 32-bit builds. VMX diverges from bare metal in the sense that the associated VMCS fields are natural width fields, whereas the actual MSRs hold 64-bit values, even on CPUs that don't support 64-bit mode. This causes the tests to fail if bits 63:32 are non-zero and a VM-Exit/VM-Enter occurs on and/or between WRMSR/RDMSR, e.g. when running the tests in L1 or deeper. Don't bother trying to actually test that bits 63:32 are dropped, the behavior depends on the (virtual) CPU capabilities, not the build, and the behavior is specific to VMX as both SVM and bare metal preserve the full 64-bit values. And because practically no one cares about 32-bit KVM, let alone an obscure architectural quirk that doesn't affect real world kernels. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> --- x86/msr.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)