| Message ID | 20200716031627.11492-6-weijiang.yang@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Introduce support for guest CET feature | expand |
On Thu, Jul 16, 2020 at 11:16:21AM +0800, Yang Weijiang wrote: > CPUID(0xd, 1) reports the current required storage size of XCR0 | XSS, > when guest updates the XSS, it's necessary to update the CPUID leaf, otherwise > guest will fetch old state size, and results to some WARN traces during guest > running. > > supported_xss is initialized to host_xss & KVM_SUPPORTED_XSS to indicate current > MSR_IA32_XSS bits supported in KVM, but actual XSS bits seen in guest depends > on the setting of CPUID(0xd,1).{ECX, EDX} for guest. > > Co-developed-by: Zhang Yi Z <yi.z.zhang@linux.intel.com> > Signed-off-by: Zhang Yi Z <yi.z.zhang@linux.intel.com> > Signed-off-by: Yang Weijiang <weijiang.yang@intel.com> > --- > arch/x86/include/asm/kvm_host.h | 1 + > arch/x86/kvm/cpuid.c | 23 +++++++++++++++++++---- > arch/x86/kvm/x86.c | 12 ++++++++---- > 3 files changed, 28 insertions(+), 8 deletions(-) > > diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h > index be5363b21540..e8c749596ba2 100644 > --- a/arch/x86/include/asm/kvm_host.h > +++ b/arch/x86/include/asm/kvm_host.h > @@ -654,6 +654,7 @@ struct kvm_vcpu_arch { > > u64 xcr0; > u64 guest_supported_xcr0; > + u64 guest_supported_xss; > > struct kvm_pio_request pio; > void *pio_data; > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c > index 8a294f9747aa..d97b2a6e8a8c 100644 > --- a/arch/x86/kvm/cpuid.c > +++ b/arch/x86/kvm/cpuid.c > @@ -88,14 +88,29 @@ int kvm_update_cpuid(struct kvm_vcpu *vcpu) > vcpu->arch.guest_supported_xcr0 = 0; > } else { > vcpu->arch.guest_supported_xcr0 = > - (best->eax | ((u64)best->edx << 32)) & supported_xcr0; > + (((u64)best->edx << 32) | best->eax) & supported_xcr0; While I don't necessarily disagree with the change, it doesn't belong in this patch. > best->ebx = xstate_required_size(vcpu->arch.xcr0, false); > } > > best = kvm_find_cpuid_entry(vcpu, 0xD, 1); > - if (best && (cpuid_entry_has(best, X86_FEATURE_XSAVES) || > - cpuid_entry_has(best, X86_FEATURE_XSAVEC))) > - best->ebx = xstate_required_size(vcpu->arch.xcr0, true); > + if (best) { > + if (cpuid_entry_has(best, X86_FEATURE_XSAVES) || > + cpuid_entry_has(best, X86_FEATURE_XSAVEC)) { > + u64 xstate = vcpu->arch.xcr0 | vcpu->arch.ia32_xss; > + > + best->ebx = xstate_required_size(xstate, true); > + } > + > + if (!cpuid_entry_has(best, X86_FEATURE_XSAVES)) { > + best->ecx = 0; > + best->edx = 0; > + } > + vcpu->arch.guest_supported_xss = > + (((u64)best->edx << 32) | best->ecx) & supported_xss; > + > + } else { > + vcpu->arch.guest_supported_xss = 0; > + } > > /* > * The existing code assumes virtual address is 48-bit or 57-bit in the > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > index 906e07039d59..8aed32ff9c0c 100644 > --- a/arch/x86/kvm/x86.c > +++ b/arch/x86/kvm/x86.c > @@ -2912,9 +2912,12 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) > * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than > * XSAVES/XRSTORS to save/restore PT MSRs. > */ > - if (data & ~supported_xss) > + if (data & ~vcpu->arch.guest_supported_xss) > return 1; > - vcpu->arch.ia32_xss = data; > + if (vcpu->arch.ia32_xss != data) { > + vcpu->arch.ia32_xss = data; > + kvm_update_cpuid(vcpu); > + } > break; > case MSR_SMI_COUNT: > if (!msr_info->host_initiated) > @@ -9779,8 +9782,9 @@ int kvm_arch_hardware_setup(void *opaque) > > memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops)); > > - if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES)) > - supported_xss = 0; > + supported_xss = 0; > + if (kvm_cpu_cap_has(X86_FEATURE_XSAVES)) > + supported_xss = host_xss & KVM_SUPPORTED_XSS; Updating supported_xss in the actual enabling patch. > > #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f) > cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_); > -- > 2.17.2 >
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index be5363b21540..e8c749596ba2 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -654,6 +654,7 @@ struct kvm_vcpu_arch { u64 xcr0; u64 guest_supported_xcr0; + u64 guest_supported_xss; struct kvm_pio_request pio; void *pio_data; diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 8a294f9747aa..d97b2a6e8a8c 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -88,14 +88,29 @@ int kvm_update_cpuid(struct kvm_vcpu *vcpu) vcpu->arch.guest_supported_xcr0 = 0; } else { vcpu->arch.guest_supported_xcr0 = - (best->eax | ((u64)best->edx << 32)) & supported_xcr0; + (((u64)best->edx << 32) | best->eax) & supported_xcr0; best->ebx = xstate_required_size(vcpu->arch.xcr0, false); } best = kvm_find_cpuid_entry(vcpu, 0xD, 1); - if (best && (cpuid_entry_has(best, X86_FEATURE_XSAVES) || - cpuid_entry_has(best, X86_FEATURE_XSAVEC))) - best->ebx = xstate_required_size(vcpu->arch.xcr0, true); + if (best) { + if (cpuid_entry_has(best, X86_FEATURE_XSAVES) || + cpuid_entry_has(best, X86_FEATURE_XSAVEC)) { + u64 xstate = vcpu->arch.xcr0 | vcpu->arch.ia32_xss; + + best->ebx = xstate_required_size(xstate, true); + } + + if (!cpuid_entry_has(best, X86_FEATURE_XSAVES)) { + best->ecx = 0; + best->edx = 0; + } + vcpu->arch.guest_supported_xss = + (((u64)best->edx << 32) | best->ecx) & supported_xss; + + } else { + vcpu->arch.guest_supported_xss = 0; + } /* * The existing code assumes virtual address is 48-bit or 57-bit in the diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 906e07039d59..8aed32ff9c0c 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2912,9 +2912,12 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than * XSAVES/XRSTORS to save/restore PT MSRs. */ - if (data & ~supported_xss) + if (data & ~vcpu->arch.guest_supported_xss) return 1; - vcpu->arch.ia32_xss = data; + if (vcpu->arch.ia32_xss != data) { + vcpu->arch.ia32_xss = data; + kvm_update_cpuid(vcpu); + } break; case MSR_SMI_COUNT: if (!msr_info->host_initiated) @@ -9779,8 +9782,9 @@ int kvm_arch_hardware_setup(void *opaque) memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops)); - if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES)) - supported_xss = 0; + supported_xss = 0; + if (kvm_cpu_cap_has(X86_FEATURE_XSAVES)) + supported_xss = host_xss & KVM_SUPPORTED_XSS; #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f) cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
CPUID(0xd, 1) reports the current required storage size of XCR0 | XSS, when guest updates the XSS, it's necessary to update the CPUID leaf, otherwise guest will fetch old state size, and results to some WARN traces during guest running. supported_xss is initialized to host_xss & KVM_SUPPORTED_XSS to indicate current MSR_IA32_XSS bits supported in KVM, but actual XSS bits seen in guest depends on the setting of CPUID(0xd,1).{ECX, EDX} for guest. Co-developed-by: Zhang Yi Z <yi.z.zhang@linux.intel.com> Signed-off-by: Zhang Yi Z <yi.z.zhang@linux.intel.com> Signed-off-by: Yang Weijiang <weijiang.yang@intel.com> --- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/cpuid.c | 23 +++++++++++++++++++---- arch/x86/kvm/x86.c | 12 ++++++++---- 3 files changed, 28 insertions(+), 8 deletions(-)