From patchwork Thu Aug 6 00:14:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Adams X-Patchwork-Id: 11702611 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8B4EC1731 for ; Thu, 6 Aug 2020 00:15:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 76BB922CA1 for ; Thu, 6 Aug 2020 00:15:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="qsJnTMnJ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726824AbgHFAPm (ORCPT ); Wed, 5 Aug 2020 20:15:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59760 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726710AbgHFAOx (ORCPT ); Wed, 5 Aug 2020 20:14:53 -0400 Received: from mail-pg1-x54a.google.com (mail-pg1-x54a.google.com [IPv6:2607:f8b0:4864:20::54a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DED34C0617A2 for ; Wed, 5 Aug 2020 17:14:49 -0700 (PDT) Received: by mail-pg1-x54a.google.com with SMTP id n32so32281723pgb.22 for ; Wed, 05 Aug 2020 17:14:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=1TZQegrBgPNN+SZZCsJyOP7eFX7H3/9/2zydOordKRU=; b=qsJnTMnJzhHJ++LUWoW6vocFm9wQINlyHtBzo7IvEhVyEwAtb06Zi9j/kRHMJDwXAY c4q3OKOo1paE2JI/Ch8SsUXyeA32JxJfHUdsxjykJaLHZ9uX42l4Ya6TMzSf44/H+eaJ d7KsrKFoKq5tHnIMiIRo2p3aO2riXoj8vi5KuvEuqoZqM2UM1f8BH3kG3J0viFBjRptM 7DpDoV9WspbpLg1CscM1TZRvWdGbvNEMmm8SosvVe2NQdit2xFcP0cWoGAEuuEbQjk01 wvm1Q64ky28ceB8zE5xbFgyohfzog8hHeE2wpEbMRRKOfuFQSNZEvLUbVXmSjKO8XLFP mpLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=1TZQegrBgPNN+SZZCsJyOP7eFX7H3/9/2zydOordKRU=; b=FNP2X0IJaYv7CnvyCiMphGdYxvpBMQkcSap84VZirQTupHmb9Ru6BNA0nMvvPuzgOh PoFqq5NTt2SeWKEZgG5Vu8HA1EyORhiPfPziVSKrhOA9ROr61fNZ+3CAALiY1LYblzfY wTCeLYqkYBHxIq7ujApp6s84Fpe6laymqW1ZJy4VoV6ikFpjnmtrtP1MjyXmVYsD277b 1FQNJARaqKRZOhf5pfDEYGw6aYZx6R7R4+67A1o2dDXxmTP7qOaZzjAv7eSKPTWnGKPe w1XBdFJwU8+aa3SEY0uAlEzjSyBl/SQdlUq45MUwtagTGzsCt/H2weKbsk5v80BMzqXe GtFg== X-Gm-Message-State: AOAM530OeHCULyg2aWw1BDeQ9ddsqNx5fvhHX6gwoDc35oIUmAMy4tfn 02o/6CEK0+5rWqmYjkFwR3MmS4tWk5g= X-Google-Smtp-Source: ABdhPJzWesUuEo6x2rN3Nm6v64LxNCg4UBk6LxLot+d7AbyMBxKZ1ILWaBDQ3eW+eSFDwmhwT8OT1FjRpOVL X-Received: by 2002:a17:902:ee82:: with SMTP id a2mr5234478pld.204.1596672889356; Wed, 05 Aug 2020 17:14:49 -0700 (PDT) Date: Wed, 5 Aug 2020 17:14:30 -0700 In-Reply-To: <20200806001431.2072150-1-jwadams@google.com> Message-Id: <20200806001431.2072150-7-jwadams@google.com> Mime-Version: 1.0 References: <20200806001431.2072150-1-jwadams@google.com> X-Mailer: git-send-email 2.28.0.236.gb10cc79966-goog Subject: [RFC PATCH 6/7] core/metricfs: expose x86-specific irq information through metricfs From: Jonathan Adams To: linux-kernel@vger.kernel.org Cc: kvm@vger.kernel.org, Paolo Bonzini , Jim Mattson , David Rientjes , Jonathan Adams Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Add metricfs support for displaying percpu irq counters for x86. The top directory is /sys/kernel/debug/metricfs/irq_x86. Then there is a subdirectory for each x86-specific irq counter. For example: cat /sys/kernel/debug/metricfs/irq_x86/TLB/values Signed-off-by: Jonathan Adams --- jwadams@google.com: rebased to 5.8-pre6 This is work originally done by another engineer at google, who would rather not have their name associated with this patchset. They're okay with me sending it under my name. --- arch/x86/kernel/irq.c | 80 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c index 181060247e3c..ffacbbc4066c 100644 --- a/arch/x86/kernel/irq.c +++ b/arch/x86/kernel/irq.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include @@ -374,3 +375,82 @@ void fixup_irqs(void) } } #endif + +#ifdef CONFIG_METRICFS +#define METRICFS_ITEM(name, field, desc) \ +static void \ +metricfs_##name(struct metric_emitter *e, int cpu) \ +{ \ + int64_t v = irq_stats(cpu)->field; \ + METRIC_EMIT_PERCPU_INT(e, cpu, v); \ +} \ +METRIC_EXPORT_PERCPU_COUNTER(name, desc, metricfs_##name) + +METRICFS_ITEM(NMI, __nmi_count, "Non-maskable interrupts"); +#ifdef CONFIG_X86_LOCAL_APIC +METRICFS_ITEM(LOC, apic_timer_irqs, "Local timer interrupts"); +METRICFS_ITEM(SPU, irq_spurious_count, "Spurious interrupts"); +METRICFS_ITEM(PMI, apic_perf_irqs, "Performance monitoring interrupts"); +METRICFS_ITEM(IWI, apic_irq_work_irqs, "IRQ work interrupts"); +METRICFS_ITEM(RTR, icr_read_retry_count, "APIC ICR read retries"); +#endif +METRICFS_ITEM(PLT, x86_platform_ipis, "Platform interrupts"); +#ifdef CONFIG_SMP +METRICFS_ITEM(RES, irq_resched_count, "Rescheduling interrupts"); +METRICFS_ITEM(CAL, irq_call_count, "Function call interrupts"); +METRICFS_ITEM(TLB, irq_tlb_count, "TLB shootdowns"); +#endif +#ifdef CONFIG_X86_THERMAL_VECTOR +METRICFS_ITEM(TRM, irq_thermal_count, "Thermal event interrupts"); +#endif +#ifdef CONFIG_X86_MCE_THRESHOLD +METRICFS_ITEM(THR, irq_threshold_count, "Threshold APIC interrupts"); +#endif +#ifdef CONFIG_X86_MCE_AMD +METRICFS_ITEM(DFR, irq_deferred_error_count, "Deferred Error APIC interrupts"); +#endif +#ifdef CONFIG_HAVE_KVM +METRICFS_ITEM(PIN, kvm_posted_intr_ipis, "Posted-interrupt notification event"); +METRICFS_ITEM(PIW, kvm_posted_intr_wakeup_ipis, + "Posted-interrupt wakeup event"); +#endif + +static int __init init_irq_metricfs(void) +{ + struct metricfs_subsys *subsys; + + subsys = metricfs_create_subsys("irq_x86", NULL); + + metric_init_NMI(subsys); +#ifdef CONFIG_X86_LOCAL_APIC + metric_init_LOC(subsys); + metric_init_SPU(subsys); + metric_init_PMI(subsys); + metric_init_IWI(subsys); + metric_init_RTR(subsys); +#endif + metric_init_PLT(subsys); +#ifdef CONFIG_SMP + metric_init_RES(subsys); + metric_init_CAL(subsys); + metric_init_TLB(subsys); +#endif +#ifdef CONFIG_X86_THERMAL_VECTOR + metric_init_TRM(subsys); +#endif +#ifdef CONFIG_X86_MCE_THRESHOLD + metric_init_THR(subsys); +#endif +#ifdef CONFIG_X86_MCE_AMD + metric_init_DFR(subsys); +#endif +#ifdef CONFIG_HAVE_KVM + metric_init_PIN(subsys); + metric_init_PIW(subsys); +#endif + + return 0; +} +module_init(init_irq_metricfs); + +#endif